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[209.132.180.67]) by mx.google.com with ESMTP id n7si11745142pga.199.2018.04.17.07.11.39; Tue, 17 Apr 2018 07:11:53 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=nv7kuKXi; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752938AbeDQOJs (ORCPT + 99 others); Tue, 17 Apr 2018 10:09:48 -0400 Received: from fllnx209.ext.ti.com ([198.47.19.16]:24414 "EHLO fllnx209.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752221AbeDQOJ3 (ORCPT ); Tue, 17 Apr 2018 10:09:29 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by fllnx209.ext.ti.com (8.15.1/8.15.1) with ESMTP id w3HE93sN001133; Tue, 17 Apr 2018 09:09:03 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1523974143; bh=CJYTN7HDCD8sC7bI+tYvWtBcObTw6qzzN5MIwPgBMoQ=; h=Subject:To:CC:References:From:Date:In-Reply-To; b=nv7kuKXibgLsHcBpQe4a2WIAzWtxZmG/ZHfoQTZYYU9qobhkAmrN8RgT+52jiOpeN QlGA4q/Q7I8lF5Dbaj37Y/5OJubl0ap3xUXr8kCgiWQTjbrr7VvEDWjlYZcicYoENF 0Zh6fNxuHffsPfC/k+qDrLbRYQbArDB8li1A9K1c= Received: from DFLE112.ent.ti.com (dfle112.ent.ti.com [10.64.6.33]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id w3HE93O6026002; Tue, 17 Apr 2018 09:09:03 -0500 Received: from DFLE102.ent.ti.com (10.64.6.23) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1261.35; Tue, 17 Apr 2018 09:09:03 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1261.35 via Frontend Transport; Tue, 17 Apr 2018 09:09:03 -0500 Received: from [172.24.190.172] (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w3HE90vs016617; Tue, 17 Apr 2018 09:09:01 -0500 Subject: Re: [RESEND PATCH v2 3/4] ARM: davinci: add aemif & nand support to da850-lcdk in legacy mode To: Bartosz Golaszewski , Kevin Hilman , Russell King , Santosh Shilimkar CC: , , Bartosz Golaszewski References: <20180417102917.7794-1-brgl@bgdev.pl> <20180417102917.7794-4-brgl@bgdev.pl> From: Sekhar Nori Message-ID: Date: Tue, 17 Apr 2018 19:39:00 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.7.0 MIME-Version: 1.0 In-Reply-To: <20180417102917.7794-4-brgl@bgdev.pl> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tuesday 17 April 2018 03:59 PM, Bartosz Golaszewski wrote: > From: Bartosz Golaszewski > > We now have support for aemif & nand from board files. As an example > add support for nand to da850-lcdk in legacy mode. Hawkboard is a separate board of its own, although closely related to LCDK. Lets refer to it as hawkboard itself, instead of "LCDK in legacy mode". So: ARM: davinci: omapl138-hawk: ... > > Signed-off-by: Bartosz Golaszewski > --- > arch/arm/mach-davinci/board-omapl138-hawk.c | 132 ++++++++++++++++++++ > 1 file changed, 132 insertions(+) > > diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c > index 6c997c59a3cd..9c3de56b54e4 100644 > --- a/arch/arm/mach-davinci/board-omapl138-hawk.c > +++ b/arch/arm/mach-davinci/board-omapl138-hawk.c > @@ -16,6 +16,11 @@ > #include > #include > #include > +#include > +#include > +#include > +#include > +#include > #include > > #include > @@ -162,6 +167,129 @@ static __init void omapl138_hawk_mmc_init(void) > gpiod_remove_lookup_table(&mmc_gpios_table); > } > > +static struct mtd_partition omapl138_hawk_nandflash_partition[] = { > + { > + .name = "u-boot env", > + .offset = 0, > + .size = SZ_128K, > + .mask_flags = MTD_WRITEABLE, > + }, > + { > + .name = "u-boot", > + .offset = MTDPART_OFS_APPEND, > + .size = SZ_128K, Can you make it 512K as it is in da850-lcdk.dts ? > + .mask_flags = MTD_WRITEABLE, > + }, > + { > + .name = "free space", > + .offset = MTDPART_OFS_APPEND, > + .size = MTDPART_SIZ_FULL, > + .mask_flags = 0, > + }, > +}; > +static struct aemif_abus_data omapl138_hawk_aemif_abus_data[] = { > + { > + .cs = 3, > + } > +}; > + > +static struct platform_device omapl138_hawk_aemif_devices[] = { > + { > + .name = "davinci_nand", > + .id = 1, Is there a reason for .id to be set to 1 here? Ideally it should be -1, I think since there is a single NAND on the board. Note that I sent a patch dropping AEMIF clock acquisition from DaVinci NAND driver. > + .dev = { > + .platform_data = &omapl138_hawk_nandflash_data, > + }, > + .resource = omapl138_hawk_nandflash_resource, > + .num_resources = ARRAY_SIZE(omapl138_hawk_nandflash_resource), > + .id = 0, This should have resulted in a double init warning? Thanks, Sekhar