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[209.132.180.67]) by mx.google.com with ESMTP id u8-v6si674452plh.22.2018.04.18.00.03.42; Wed, 18 Apr 2018 00:03:57 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@apm.com header.s=apm header.b=GFQgVCZg; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=apm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752731AbeDRHCf (ORCPT + 99 others); Wed, 18 Apr 2018 03:02:35 -0400 Received: from mail-it0-f68.google.com ([209.85.214.68]:40163 "EHLO mail-it0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752085AbeDRHCd (ORCPT ); Wed, 18 Apr 2018 03:02:33 -0400 Received: by mail-it0-f68.google.com with SMTP id u62-v6so1219922ita.5 for ; Wed, 18 Apr 2018 00:02:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=apm.com; s=apm; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=LqKYQEICgpuEZREFfQnXrLPW5xxh3jIzB/rcunlq8MQ=; b=GFQgVCZgFMtFIChZvmlCh625dXzqOlSQL2HSAMABuBJn7A/y2eLpojjV1YjtS9MOO+ lyuHtKvXCg5tlQ1ICUWZNdiRUF8AEf6VhIJupFVFJkyj5CV3FZJwZEDNI3HrWvGizFyT YkO6lbXYaijA+5GKG/pV9OFFf3U7UbwiL9ae8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=LqKYQEICgpuEZREFfQnXrLPW5xxh3jIzB/rcunlq8MQ=; b=TKXPhNZe/N1fPlpNgvJ28TVMXiCsUC1EEnqzPngmxFZFDXtfGeLpC5F3tOancwTINZ C/yKv6leE76Eg/NyDaoTrTdtaER1F8iJwvz4bVQkuAYzPmTWTFkBROElv/80VMO3EiAy bFG/zfmA2NmFMzH6oTjpPqBq9xbUzxC19RwbnECXQR9DAOeCMY+CnstsmmAZBmxIFfia bVN8EkQAaEzwLunWsEln2E+73+u/2uJQymMcuVGh/H9gR7ki5/hhJZQIC0F2vYXDyDqD QVENUYnzrFCPL2Oq1G0uUSaspJJE4/D+fMeNQJ2c3dMz+TVG3scv4LRi4ZqepfCRtbeB 1ATg== X-Gm-Message-State: ALQs6tDRGD5d/5js12KNXc+olSAOxBd8HCgG9FTqMiU9Ibr++tFESDY/ 8JUg1cW5mLN3+ECTtfE70BgD3CuQPHkLrO0T+M0glA== X-Received: by 2002:a24:770c:: with SMTP id g12-v6mr1152427itc.137.1524034952332; Wed, 18 Apr 2018 00:02:32 -0700 (PDT) MIME-Version: 1.0 Received: by 10.107.89.17 with HTTP; Wed, 18 Apr 2018 00:02:31 -0700 (PDT) In-Reply-To: References: <1523609472-4481-1-git-send-email-phil.edworthy@renesas.com> From: Hoan Tran Date: Wed, 18 Apr 2018 00:02:31 -0700 Message-ID: Subject: Re: [PATCH v3] gpio: dwapb: Add support for 1 interrupt per port A GPIO To: Phil Edworthy Cc: Linus Walleij , Rob Herring , Mark Rutland , Lee Jones , Andy Shevchenko , Michel Pollet , "linux-gpio@vger.kernel.org" , Devicetree List , "linux-renesas-soc@vger.kernel.org" , lkml Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Phil, On Fri, Apr 13, 2018 at 9:47 AM, Phil Edworthy wrote: > Hi Hoan, > > On 13 April 2018 17:37 Hoan Tran wrote: >> On Fri, Apr 13, 2018 at 1:51 AM, Phil Edworthy wrote: >> > The DesignWare GPIO IP can be configured for either 1 interrupt or 1 >> > per GPIO in port A, but the driver currently only supports 1 interrupt= . >> > See the DesignWare DW_apb_gpio Databook description of the >> > 'GPIO_INTR_IO' parameter. >> > >> > This change allows the driver to work with up to 32 interrupts, it >> > will get as many interrupts as specified in the DT 'interrupts' proper= ty. >> > It doesn't do anything clever with the different interrupts, it just >> > calls the same handler used for single interrupt hardware. >> > >> > Signed-off-by: Phil Edworthy >> > --- >> > One point to mention is that I have made it possible for users to have >> > unconncted interrupts by specifying holes in the list of interrupts. >> > This is done by supporting the interrupts-extended DT prop. >> > However, I have no use for this and had to hack some test case for thi= s. >> > Perhaps the driver should support 1 interrupt or all GPIOa as interrup= ts? >> > >> > v3: >> > - Rolled mfd: intel_quark_i2c_gpio fix into this patch to avoid >> > bisect problems >> > v2: >> > - Replaced interrupt-mask DT prop with support for the interrupts- >> extended >> > prop. This means replacing the call to irq_of_parse_and_map() with = calls >> > to of_irq_parse_one() and irq_create_of_mapping(). >> > >> > Note: There are a few *code* lines over 80 chars, but this is just gui= dance, >> > right? Especially as there are already some lines over 80 chars. >> > --- > [snip] > >> > - if (has_acpi_companion(dev) && pp->idx =3D=3D 0) >> > - pp->irq =3D platform_get_irq(to_platform_devic= e(dev), 0); >> > + if (has_acpi_companion(dev) && pp->idx =3D=3D 0) { >> > + pp->irq[0] =3D platform_get_irq(to_platform_de= vice(dev), 0); >> > + if (pp->irq[0]) >> > + pp->has_irq =3D true; >> > + } >> >> It doesn't work for ACPI. Could you do the same logic for ACPI? > I don=E2=80=99t have access to any device that was baked (i.e. fabbed) wi= th multiple > output interrupts from the Synopsys GPIO blocks and use ACPI. I don't > know if any such device exists. Below code is tested on X-Gene system which supports 1 interrupt per GPIO on Port A. You can update it into your patch. - if (has_acpi_companion(dev) && pp->idx =3D=3D 0) - pp->irq =3D platform_get_irq(to_platform_device(dev= ), 0); + if (has_acpi_companion(dev) && pp->idx =3D=3D 0) { + unsigned int j; + for (j =3D 0; j < pp->ngpio; j++) { + pp->irq[j] =3D platform_get_irq(to_platform_device(dev), j); + if (pp->irq[j]) + pp->has_irq =3D true; + } + } Thanks Hoan > > I would prefer not writing code that can be tested easily. I cannot even > test the current, albeit small, changes to the Intel Quark MFD. > > Regards > Phil > >> Thanks >> Hoan >> >> > >> > pp->irq_shared =3D false; >> > pp->gpio_base =3D -1; >> > diff --git a/drivers/mfd/intel_quark_i2c_gpio.c >> > b/drivers/mfd/intel_quark_i2c_gpio.c >> > index 90e35de..5bddb84 100644 >> > --- a/drivers/mfd/intel_quark_i2c_gpio.c >> > +++ b/drivers/mfd/intel_quark_i2c_gpio.c >> > @@ -233,7 +233,8 @@ static int intel_quark_gpio_setup(struct pci_dev >> *pdev, struct mfd_cell *cell) >> > pdata->properties->idx =3D 0; >> > pdata->properties->ngpio =3D INTEL_QUARK_MFD_NGPIO; >> > pdata->properties->gpio_base =3D INTEL_QUARK_MFD_GPIO_BASE; >> > - pdata->properties->irq =3D pdev->irq; >> > + pdata->properties->irq[0] =3D pdev->irq; >> > + pdata->properties->has_irq =3D true; >> > pdata->properties->irq_shared =3D true; >> > >> > cell->platform_data =3D pdata; >> > diff --git a/include/linux/platform_data/gpio-dwapb.h >> > b/include/linux/platform_data/gpio-dwapb.h >> > index 2dc7f4a..5a52d69 100644 >> > --- a/include/linux/platform_data/gpio-dwapb.h >> > +++ b/include/linux/platform_data/gpio-dwapb.h >> > @@ -19,7 +19,8 @@ struct dwapb_port_property { >> > unsigned int idx; >> > unsigned int ngpio; >> > unsigned int gpio_base; >> > - unsigned int irq; >> > + unsigned int irq[32]; >> > + bool has_irq; >> > bool irq_shared; >> > }; >> > >> > -- >> > 2.7.4 >> >