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[209.132.180.67]) by mx.google.com with ESMTP id x11si1826112pgr.147.2018.04.18.16.35.59; Wed, 18 Apr 2018 16:36:13 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752407AbeDRXex convert rfc822-to-8bit (ORCPT + 99 others); Wed, 18 Apr 2018 19:34:53 -0400 Received: from mail.kernel.org ([198.145.29.99]:51974 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752091AbeDRXev (ORCPT ); Wed, 18 Apr 2018 19:34:51 -0400 Received: from localhost (unknown [104.132.1.75]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id CF76D21781; Wed, 18 Apr 2018 23:34:50 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org CF76D21781 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=sboyd@kernel.org Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8BIT To: Amit Nischal From: Stephen Boyd In-Reply-To: Cc: Michael Turquette , Stephen Boyd , Andy Gross , David Brown , Rajendra Nayak , Odelu Kukatla , Taniya Das , linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org References: <1522761761-15262-1-git-send-email-anischal@codeaurora.org> <1522761761-15262-4-git-send-email-anischal@codeaurora.org> <152393708031.51482.15076025836699678476@swboyd.mtv.corp.google.com> Message-ID: <152409449007.51482.18266317845214727195@swboyd.mtv.corp.google.com> User-Agent: alot/0.7 Subject: Re: [PATCH v3 3/3] clk: qcom: Add Global Clock controller (GCC) driver for SDM845 Date: Wed, 18 Apr 2018 16:34:50 -0700 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Quoting Amit Nischal (2018-04-18 06:03:49) > On 2018-04-17 09:21, Stephen Boyd wrote: > > Quoting Amit Nischal (2018-04-03 06:22:41) > >> + > >> +static struct clk_rcg2 gcc_usb30_prim_mock_utmi_clk_src = { > >> + .cmd_rcgr = 0xf030, > >> + .mnd_width = 0, > >> + .hid_width = 5, > >> + .parent_map = gcc_parent_map_0, > >> + .freq_tbl = ftbl_gcc_usb30_prim_mock_utmi_clk_src, > >> + .clkr.hw.init = &(struct clk_init_data){ > >> + .name = "gcc_usb30_prim_mock_utmi_clk_src", > >> + .parent_names = gcc_parent_names_0, > >> + .num_parents = 4, > >> + .ops = &clk_rcg2_shared_ops, > > > > Still shared? Why? > > We would require the shared_ops for clocks which are configured by > bootloader. Why? The bootloader is not active anymore. > > > >> + > >> + return qcom_cc_really_probe(pdev, &gcc_sdm845_desc, regmap); > >> +} > >> + > >> diff --git a/include/dt-bindings/clock/qcom,gcc-sdm845.h > >> b/include/dt-bindings/clock/qcom,gcc-sdm845.h > >> new file mode 100644 > >> index 0000000..e27d8e2 > >> --- /dev/null > >> +++ b/include/dt-bindings/clock/qcom,gcc-sdm845.h > >> @@ -0,0 +1,242 @@ > > [...] > >> +#define GCC_VDDA_VS_CLK > >> 180 > >> +#define GCC_VDDCX_VS_CLK 181 > >> +#define GCC_VDDMX_VS_CLK 182 > >> +#define GCC_VS_CTRL_AHB_CLK 183 > >> +#define GCC_VS_CTRL_CLK > >> 184 > >> +#define GCC_VS_CTRL_CLK_SRC 185 > >> +#define GCC_VSENSOR_CLK_SRC 186 > >> +#define GPLL4 187 > > > > Do you have the define for the quad spi clks? And the implementation > > for > > it? > > > > In SDM845, Quad SPI clocks are part of gcc_qupv*_wrap*_s* clock group. Ok thanks. I must have messed up my math before because it didn't match what bootloader was doing last time I checked.