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[209.132.180.67]) by mx.google.com with ESMTP id v2si3727840pge.105.2018.04.19.15.20.44; Thu, 19 Apr 2018 15:20:59 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=BVAC3hsy; dkim=pass header.i=@codeaurora.org header.s=default header.b=V2AaDEJk; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754015AbeDSWS5 (ORCPT + 99 others); Thu, 19 Apr 2018 18:18:57 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:57336 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753860AbeDSWQw (ORCPT ); Thu, 19 Apr 2018 18:16:52 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id A2B3F6081C; Thu, 19 Apr 2018 22:16:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1524176210; bh=Dh5UNT9M6U8ZsTQDHMnZL8+6xUwHQqN9jwiK470XNZk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=BVAC3hsyRCDYxkNx67pqFZnKilOdFXYQ8lLs9AP9DkeAXQTSmW+MlhjiRCxeV8Hx8 VhfwseTx4E1fTN8d3gIbvDVKDM3OPcR6vYKxGp1KxOTmAZa/U4mqQW/wVtOSumQvsE IYtZ4vY4cq2/tU8sdm7OZHsvkukXW2Ci5ABndQoc= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED,T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from codeaurora.org (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: ilina@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id DE30A60F8F; Thu, 19 Apr 2018 22:16:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1524176207; bh=Dh5UNT9M6U8ZsTQDHMnZL8+6xUwHQqN9jwiK470XNZk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=V2AaDEJkIBqx00LbwzY1dzzOe7Ztnm+ZI2pX0ktZLFZoiZ26VTP0MnE9KzF/NfhUD vEw6XPTfrDBPDYnI1w+WKQ7R00g0g2Lu02VdkWSV9qa/vsAi8IYmbAlD7s6jGv60kH a2rwf+2usJOs3l8Zmsi16nnZA83Hg8qbFYQIaSss= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org DE30A60F8F Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=ilina@codeaurora.org From: Lina Iyer To: andy.gross@linaro.org, david.brown@linaro.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org Cc: rnayak@codeaurora.org, bjorn.andersson@linaro.org, linux-kernel@vger.kernel.org, sboyd@kernel.org, evgreen@chromium.org, dianders@chromium.org, Lina Iyer Subject: [PATCH v6 04/10] drivers: qcom: rpmh: add RPMH helper functions Date: Thu, 19 Apr 2018 16:16:29 -0600 Message-Id: <20180419221635.17849-5-ilina@codeaurora.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180419221635.17849-1-ilina@codeaurora.org> References: <20180419221635.17849-1-ilina@codeaurora.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Sending RPMH requests and waiting for response from the controller through a callback is common functionality across all platform drivers. To simplify drivers, add a library functions to create RPMH client and send resource state requests. rpmh_write() is a synchronous blocking call that can be used to send active state requests. Signed-off-by: Lina Iyer --- Changes in v6: - replace rpmh_client with device - inline wait_for_tx_done() Changes in v4: - use const struct tcs_cmd in API - remove wait count from this patch - changed -EFAULT to -EINVAL --- drivers/soc/qcom/Makefile | 4 +- drivers/soc/qcom/rpmh-internal.h | 6 ++ drivers/soc/qcom/rpmh-rsc.c | 8 ++ drivers/soc/qcom/rpmh.c | 168 +++++++++++++++++++++++++++++++ include/soc/qcom/rpmh.h | 25 +++++ 5 files changed, 210 insertions(+), 1 deletion(-) create mode 100644 drivers/soc/qcom/rpmh.c create mode 100644 include/soc/qcom/rpmh.h diff --git a/drivers/soc/qcom/Makefile b/drivers/soc/qcom/Makefile index cb6300f6a8e9..bb395c3202ca 100644 --- a/drivers/soc/qcom/Makefile +++ b/drivers/soc/qcom/Makefile @@ -7,7 +7,9 @@ obj-$(CONFIG_QCOM_PM) += spm.o obj-$(CONFIG_QCOM_QMI_HELPERS) += qmi_helpers.o qmi_helpers-y += qmi_encdec.o qmi_interface.o obj-$(CONFIG_QCOM_RMTFS_MEM) += rmtfs_mem.o -obj-$(CONFIG_QCOM_RPMH) += rpmh-rsc.o +obj-$(CONFIG_QCOM_RPMH) += qcom_rpmh.o +qcom_rpmh-y += rpmh-rsc.o +qcom_rpmh-y += rpmh.o obj-$(CONFIG_QCOM_SMD_RPM) += smd-rpm.o obj-$(CONFIG_QCOM_SMEM) += smem.o obj-$(CONFIG_QCOM_SMEM_STATE) += smem_state.o diff --git a/drivers/soc/qcom/rpmh-internal.h b/drivers/soc/qcom/rpmh-internal.h index cc29176f1303..d9a21726e568 100644 --- a/drivers/soc/qcom/rpmh-internal.h +++ b/drivers/soc/qcom/rpmh-internal.h @@ -14,6 +14,7 @@ #define MAX_CMDS_PER_TCS 16 #define MAX_TCS_PER_TYPE 3 #define MAX_TCS_NR (MAX_TCS_PER_TYPE * TCS_TYPE_NR) +#define RPMH_MAX_CTRLR 2 struct rsc_drv; @@ -52,6 +53,7 @@ struct tcs_group { * @tcs: TCS groups * @tcs_in_use: s/w state of the TCS * @lock: synchronize state of the controller + * @list: element in list of drv */ struct rsc_drv { const char *name; @@ -61,9 +63,13 @@ struct rsc_drv { struct tcs_group tcs[TCS_TYPE_NR]; DECLARE_BITMAP(tcs_in_use, MAX_TCS_NR); spinlock_t lock; + struct list_head list; }; +extern struct list_head rsc_drv_list; int rpmh_rsc_send_data(struct rsc_drv *drv, const struct tcs_request *msg); +void rpmh_tx_done(const struct tcs_request *msg, int r); + #endif /* __RPM_INTERNAL_H__ */ diff --git a/drivers/soc/qcom/rpmh-rsc.c b/drivers/soc/qcom/rpmh-rsc.c index 9216ef478b81..d98001f7c306 100644 --- a/drivers/soc/qcom/rpmh-rsc.c +++ b/drivers/soc/qcom/rpmh-rsc.c @@ -61,6 +61,8 @@ #define CMD_STATUS_ISSUED BIT(8) #define CMD_STATUS_COMPL BIT(16) +LIST_HEAD(rsc_drv_list); + static u32 read_tcs_reg(struct rsc_drv *drv, int reg, int m, int n) { return readl_relaxed(drv->tcs_base + reg + RSC_DRV_TCS_OFFSET * m + @@ -172,6 +174,8 @@ static irqreturn_t tcs_tx_done(int irq, void *p) spin_lock(&drv->lock); clear_bit(m, drv->tcs_in_use); spin_unlock(&drv->lock); + if (req) + rpmh_tx_done(req, err); } return IRQ_HANDLED; @@ -462,6 +466,10 @@ static int rpmh_rsc_probe(struct platform_device *pdev) /* Enable the active TCS to send requests immediately */ write_tcs_reg(drv, RSC_DRV_IRQ_ENABLE, 0, drv->tcs[ACTIVE_TCS].mask); + INIT_LIST_HEAD(&drv->list); + list_add(&drv->list, &rsc_drv_list); + dev_set_drvdata(&pdev->dev, drv); + return devm_of_platform_populate(&pdev->dev); } diff --git a/drivers/soc/qcom/rpmh.c b/drivers/soc/qcom/rpmh.c new file mode 100644 index 000000000000..e978b4a8f6fb --- /dev/null +++ b/drivers/soc/qcom/rpmh.c @@ -0,0 +1,168 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include "rpmh-internal.h" + +#define RPMH_TIMEOUT_MS msecs_to_jiffies(10000) + +#define DEFINE_RPMH_MSG_ONSTACK(dev, s, q, name) \ + struct rpmh_request name = { \ + .msg = { \ + .state = s, \ + .cmds = name.cmd, \ + .num_cmds = 0, \ + .wait_for_compl = true, \ + }, \ + .cmd = { { 0 } }, \ + .completion = q, \ + .dev = dev, \ + } + +/** + * struct rpmh_request: the message to be sent to rpmh-rsc + * + * @msg: the request + * @cmd: the payload that will be part of the @msg + * @completion: triggered when request is done + * @dev: the device making the request + * @err: err return from the controller + */ +struct rpmh_request { + struct tcs_request msg; + struct tcs_cmd cmd[MAX_RPMH_PAYLOAD]; + struct completion *completion; + const struct device *dev; + int err; +}; + +/** + * struct rpmh_ctrlr: our representation of the controller + * + * @drv: the controller instance + */ +struct rpmh_ctrlr { + struct rsc_drv *drv; +}; + +static struct rpmh_ctrlr rpmh_rsc[RPMH_MAX_CTRLR]; + +static struct rpmh_ctrlr *get_rpmh_ctrlr(const struct device *dev) +{ + int i; + struct rsc_drv *p, *drv = dev_get_drvdata(dev->parent); + struct rpmh_ctrlr *ctrlr = ERR_PTR(-EINVAL); + + if (!drv) + return ctrlr; + + for (i = 0; i < RPMH_MAX_CTRLR; i++) { + if (rpmh_rsc[i].drv == drv) { + ctrlr = &rpmh_rsc[i]; + return ctrlr; + } + } + + list_for_each_entry(p, &rsc_drv_list, list) { + if (drv == p) { + for (i = 0; i < RPMH_MAX_CTRLR; i++) { + if (!rpmh_rsc[i].drv) + break; + } + rpmh_rsc[i].drv = drv; + ctrlr = &rpmh_rsc[i]; + break; + } + } + + return ctrlr; +} + +void rpmh_tx_done(const struct tcs_request *msg, int r) +{ + struct rpmh_request *rpm_msg = container_of(msg, struct rpmh_request, + msg); + struct completion *compl = rpm_msg->completion; + + rpm_msg->err = r; + + if (r) + dev_err(rpm_msg->dev, "RPMH TX fail in msg addr=%#x, err=%d\n", + rpm_msg->msg.cmds[0].addr, r); + + /* Signal the blocking thread we are done */ + if (compl) + complete(compl); +} +EXPORT_SYMBOL(rpmh_tx_done); + +/** + * __rpmh_write: send the RPMH request + * + * @dev: The device making the request + * @state: Active/Sleep request type + * @rpm_msg: The data that needs to be sent (cmds). + */ +static int __rpmh_write(const struct device *dev, enum rpmh_state state, + struct rpmh_request *rpm_msg) +{ + struct rpmh_ctrlr *ctrlr = get_rpmh_ctrlr(dev); + + if (IS_ERR(ctrlr)) + return PTR_ERR(ctrlr); + + rpm_msg->msg.state = state; + + if (state != RPMH_ACTIVE_ONLY_STATE) + return -EINVAL; + + WARN_ON(irqs_disabled()); + + return rpmh_rsc_send_data(ctrlr->drv, &rpm_msg->msg); +} + +/** + * rpmh_write: Write a set of RPMH commands and block until response + * + * @rc: The RPMh handle got from rpmh_get_client + * @state: Active/sleep set + * @cmd: The payload data + * @n: The number of elements in @cmd + * + * May sleep. Do not call from atomic contexts. + */ +int rpmh_write(const struct device *dev, enum rpmh_state state, + const struct tcs_cmd *cmd, u32 n) +{ + DECLARE_COMPLETION_ONSTACK(compl); + DEFINE_RPMH_MSG_ONSTACK(dev, state, &compl, rpm_msg); + int ret; + + if (!cmd || !n || n > MAX_RPMH_PAYLOAD) + return -EINVAL; + + memcpy(rpm_msg.cmd, cmd, n * sizeof(*cmd)); + rpm_msg.msg.num_cmds = n; + + ret = __rpmh_write(dev, state, &rpm_msg); + if (ret) + return ret; + + ret = wait_for_completion_timeout(&compl, RPMH_TIMEOUT_MS); + return (ret > 0) ? 0 : -ETIMEDOUT; +} +EXPORT_SYMBOL(rpmh_write); diff --git a/include/soc/qcom/rpmh.h b/include/soc/qcom/rpmh.h new file mode 100644 index 000000000000..c1d0f902bd71 --- /dev/null +++ b/include/soc/qcom/rpmh.h @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved. + */ + +#ifndef __SOC_QCOM_RPMH_H__ +#define __SOC_QCOM_RPMH_H__ + +#include +#include + + +#if IS_ENABLED(CONFIG_QCOM_RPMH) +int rpmh_write(const struct device *dev, enum rpmh_state state, + const struct tcs_cmd *cmd, u32 n); + +#else + +static inline int rpmh_write(const struct device *dev, enum rpmh_state state, + const struct tcs_cmd *cmd, u32 n) +{ return -ENODEV; } + +#endif /* CONFIG_QCOM_RPMH */ + +#endif /* __SOC_QCOM_RPMH_H__ */ -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project