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[209.132.180.67]) by mx.google.com with ESMTP id h12-v6si4791234pls.305.2018.04.19.23.10.05; Thu, 19 Apr 2018 23:10:19 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@apm.com header.s=apm header.b=VDYHQQ+9; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=apm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753702AbeDTGIw (ORCPT + 99 others); Fri, 20 Apr 2018 02:08:52 -0400 Received: from mail-it0-f67.google.com ([209.85.214.67]:39249 "EHLO mail-it0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753497AbeDTGIu (ORCPT ); Fri, 20 Apr 2018 02:08:50 -0400 Received: by mail-it0-f67.google.com with SMTP id 85-v6so1220109iti.4 for ; Thu, 19 Apr 2018 23:08:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=apm.com; s=apm; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=ee8y+IugEuoVoatf7AdNlOmKtV2eSx7VrJJBDw8uCec=; b=VDYHQQ+9hEiF/mGB3sU1pRfR+DxR5pXh1faJPne66DkYBeD/puVnAtIR0rylWQVrkF 2S0HKGN+037FOy3y+8TmGXA1QEu0wH2RKY4VNwA7XOypGpb/+LuDTFTO/fp3fDg59/xg 666Fsh2GgvqcSYwslnfFBnqBjnQcD4NZPUe/Y= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=ee8y+IugEuoVoatf7AdNlOmKtV2eSx7VrJJBDw8uCec=; b=Z5ItNkrI8OvwBBJCXjMEQ6s3lpOzno7KmZBn5Bu52vpqamctDbCWJuAqF1/DlCfn2H 75aYtD13HF5258w76yiE9ZH9VV96yiHHpsGiB3tKNtMwf88tY6TM2Q1qytsNSYN5ER+v B2WgBhQ2a28f9uNFLunbDYcgZxyU2tCYIKDFzD5717bhPWs85umLkpbWtYbPdeE/+A50 yOQo/BuwXPjxS/09+bDz3OlVeg+xmWfcSbdYX5pMyi7mMu1qFEHoJZAfFql28F+3ySgv 9qsYRrQyXtShbBeiYMoe1P1laHXHFl4TEW94uey9qW+R5tfJWftSdCMN5EJvHA6qCgLu tm+A== X-Gm-Message-State: ALQs6tCYeHUWgoEQtI7RT7VwD1wLXRD825cUIprirpO6Vbm+uJ2nyKo2 ycIbdDHoyLvg9FlZvZx5EzhcBwuiTlrWm4l7Kk8ddA== X-Received: by 2002:a24:468e:: with SMTP id j136-v6mr1784803itb.151.1524204529363; Thu, 19 Apr 2018 23:08:49 -0700 (PDT) MIME-Version: 1.0 Received: by 10.107.89.17 with HTTP; Thu, 19 Apr 2018 23:08:48 -0700 (PDT) In-Reply-To: References: <1523609472-4481-1-git-send-email-phil.edworthy@renesas.com> From: Hoan Tran Date: Thu, 19 Apr 2018 23:08:48 -0700 Message-ID: Subject: Re: [PATCH v3] gpio: dwapb: Add support for 1 interrupt per port A GPIO To: Phil Edworthy , Linus Walleij Cc: Rob Herring , Mark Rutland , Lee Jones , Andy Shevchenko , Michel Pollet , "linux-gpio@vger.kernel.org" , Devicetree List , "linux-renesas-soc@vger.kernel.org" , lkml Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Phil, On Thu, Apr 19, 2018 at 3:03 AM, Phil Edworthy wrote: > Hi Hoan > > On 18 April 2018 08:03 Hoan Tran wrote: >> On Fri, Apr 13, 2018 at 9:47 AM, Phil Edworthy wrote: >> > On 13 April 2018 17:37 Hoan Tran wrote: >> >> On Fri, Apr 13, 2018 at 1:51 AM, Phil Edworthy wrote: >> >> > The DesignWare GPIO IP can be configured for either 1 interrupt or >> >> > 1 per GPIO in port A, but the driver currently only supports 1 inte= rrupt. >> >> > See the DesignWare DW_apb_gpio Databook description of the >> >> > 'GPIO_INTR_IO' parameter. >> >> > >> >> > This change allows the driver to work with up to 32 interrupts, it >> >> > will get as many interrupts as specified in the DT 'interrupts' pro= perty. >> >> > It doesn't do anything clever with the different interrupts, it >> >> > just calls the same handler used for single interrupt hardware. >> >> > >> >> > Signed-off-by: Phil Edworthy >> >> > --- >> >> > One point to mention is that I have made it possible for users to >> >> > have unconncted interrupts by specifying holes in the list of inter= rupts. >> >> > This is done by supporting the interrupts-extended DT prop. >> >> > However, I have no use for this and had to hack some test case for = this. >> >> > Perhaps the driver should support 1 interrupt or all GPIOa as inter= rupts? >> >> > >> >> > v3: >> >> > - Rolled mfd: intel_quark_i2c_gpio fix into this patch to avoid >> >> > bisect problems >> >> > v2: >> >> > - Replaced interrupt-mask DT prop with support for the interrupts- >> >> extended >> >> > prop. This means replacing the call to irq_of_parse_and_map() wi= th >> calls >> >> > to of_irq_parse_one() and irq_create_of_mapping(). >> >> > >> >> > Note: There are a few *code* lines over 80 chars, but this is just >> guidance, >> >> > right? Especially as there are already some lines over 80 chars. >> >> > --- >> > [snip] >> > >> >> > - if (has_acpi_companion(dev) && pp->idx =3D=3D 0) >> >> > - pp->irq =3D platform_get_irq(to_platform_de= vice(dev), 0); >> >> > + if (has_acpi_companion(dev) && pp->idx =3D=3D 0) { >> >> > + pp->irq[0] =3D platform_get_irq(to_platform= _device(dev), >> 0); >> >> > + if (pp->irq[0]) >> >> > + pp->has_irq =3D true; >> >> > + } >> >> >> >> It doesn't work for ACPI. Could you do the same logic for ACPI? >> > I don=E2=80=99t have access to any device that was baked (i.e. fabbed)= with >> > multiple output interrupts from the Synopsys GPIO blocks and use ACPI. >> > I don't know if any such device exists. >> >> Below code is tested on X-Gene system which supports 1 interrupt per GPI= O >> on Port A. You can update it into your patch. >> >> - if (has_acpi_companion(dev) && pp->idx =3D=3D 0) >> - pp->irq =3D platform_get_irq(to_platform_device(= dev), 0); >> + if (has_acpi_companion(dev) && pp->idx =3D=3D 0) { >> + unsigned int j; >> + for (j =3D 0; j < pp->ngpio; j++) { >> + pp->irq[j] =3D >> platform_get_irq(to_platform_device(dev), j); >> + if (pp->irq[j]) >> + pp->has_irq =3D true; >> + } >> + } > Since I've already got some reviewed-by and acks for v4, I'll leave it to= Linus > to decide if he wants me to roll your changes into this patch or for you = to > submit a separate patch. > I prefer this patch works for both DTB and ACPI. Btw let Linus decide. Thanks Hoan > Thanks > Phil > > >> >> > pp->irq_shared =3D false; >> >> > pp->gpio_base =3D -1; >> >> > diff --git a/drivers/mfd/intel_quark_i2c_gpio.c >> >> > b/drivers/mfd/intel_quark_i2c_gpio.c >> >> > index 90e35de..5bddb84 100644 >> >> > --- a/drivers/mfd/intel_quark_i2c_gpio.c >> >> > +++ b/drivers/mfd/intel_quark_i2c_gpio.c >> >> > @@ -233,7 +233,8 @@ static int intel_quark_gpio_setup(struct >> >> > pci_dev >> >> *pdev, struct mfd_cell *cell) >> >> > pdata->properties->idx =3D 0; >> >> > pdata->properties->ngpio =3D INTEL_QUARK_MFD_NGPIO; >> >> > pdata->properties->gpio_base =3D >> INTEL_QUARK_MFD_GPIO_BASE; >> >> > - pdata->properties->irq =3D pdev->irq; >> >> > + pdata->properties->irq[0] =3D pdev->irq; >> >> > + pdata->properties->has_irq =3D true; >> >> > pdata->properties->irq_shared =3D true; >> >> > >> >> > cell->platform_data =3D pdata; diff --git >> >> > a/include/linux/platform_data/gpio-dwapb.h >> >> > b/include/linux/platform_data/gpio-dwapb.h >> >> > index 2dc7f4a..5a52d69 100644 >> >> > --- a/include/linux/platform_data/gpio-dwapb.h >> >> > +++ b/include/linux/platform_data/gpio-dwapb.h >> >> > @@ -19,7 +19,8 @@ struct dwapb_port_property { >> >> > unsigned int idx; >> >> > unsigned int ngpio; >> >> > unsigned int gpio_base; >> >> > - unsigned int irq; >> >> > + unsigned int irq[32]; >> >> > + bool has_irq; >> >> > bool irq_shared; >> >> > }; >> >> > >> >> > -- >> >> > 2.7.4 >> >> >