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[209.132.180.67]) by mx.google.com with ESMTP id e66-v6si4025958plb.499.2018.04.20.01.57.56; Fri, 20 Apr 2018 01:58:11 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=H+HHcYLa; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754185AbeDTI4u (ORCPT + 99 others); Fri, 20 Apr 2018 04:56:50 -0400 Received: from mail-it0-f43.google.com ([209.85.214.43]:38987 "EHLO mail-it0-f43.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754106AbeDTI4r (ORCPT ); Fri, 20 Apr 2018 04:56:47 -0400 Received: by mail-it0-f43.google.com with SMTP id 85-v6so1655472iti.4 for ; Fri, 20 Apr 2018 01:56:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=jdM26oPDbNarK71Jjx5WwR8cL3afR/FQLke2aa/RkjQ=; b=H+HHcYLaOmnZe2lQa3hKi352Y6TuI6Y6905FmnVEBcBmivxKZcZ3lldESrlqYvW2uV sYVBg8JnzF13mzcG8NMgVzXnEhlPVSJfn5n6NDGqLCa0P/n+DhpqeeYZkEnckwcCSyz8 Ry7MVUjILsItedWhOdQtvTkcByV3vyq6iOEdY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=jdM26oPDbNarK71Jjx5WwR8cL3afR/FQLke2aa/RkjQ=; b=fd2mMppcT8Y9cNZUge/qomHqVWkqi7H+tFZdWJv1QoWrOK7sC7jYflz2wNKyxiCP0p 361Rw2d5R42p9AMsvSwd1q+XhGkMzavjPECAGKdwep7EeaB3z2ig9SDBUsPWh4fM5DbC 2dL0NgdwAW6I4KuhLelLODCVph3UaFw4i5JbWZoVdf3jcvKmA7OdIqwJqtQPgdjGPdG0 wgYd5grUoJFvKhpTECLAO84La09gfOXIZ33ila2ZtXnHvkw8bWcditvYDBLSx8WWmvSS VANeBYh5Ma1ehUlQRr4FEORfnFN0KQ+Wbg9SiwwD4w2rFbj7Mg4Bx2gFeA8dpBFKJvIA liUg== X-Gm-Message-State: ALQs6tDI1pqtmwbco+IJS1SjK0f+feHq0Mp8Yl2HUGAQGpuOPCpyzR8j HtRlqWrnbuXRU2uirhylCpaCuAivrnIQ9bNaD4+7fQ== X-Received: by 2002:a24:3941:: with SMTP id l62-v6mr2004318ita.55.1524214607076; Fri, 20 Apr 2018 01:56:47 -0700 (PDT) MIME-Version: 1.0 Received: by 2002:a02:734a:0:0:0:0:0 with HTTP; Fri, 20 Apr 2018 01:56:46 -0700 (PDT) In-Reply-To: <1524210132.4614.4.camel@synopsys.com> References: <20180417121130.25281-1-Eugeniy.Paltsev@synopsys.com> <1524210132.4614.4.camel@synopsys.com> From: Ulf Hansson Date: Fri, 20 Apr 2018 10:56:46 +0200 Message-ID: Subject: Re: [RFC 0/2] dw_mmc: add multislot support To: Alexey Brodkin Cc: "jh80.chung@samsung.com" , "linux-kernel@vger.kernel.org" , "linux-mmc@vger.kernel.org" , "krzk@kernel.org" , "Eugeniy.Paltsev@synopsys.com" , "linux-snps-arc@lists.infradead.org" , "kgene@kernel.org" , "shawn.lin@rock-chips.com" , "linux-arm-kernel@lists.infradead.org" , "linux-samsung-soc@vger.kernel.org" Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 20 April 2018 at 09:42, Alexey Brodkin wrote: > Hi Ulf, > > On Fri, 2018-04-20 at 09:35 +0200, Ulf Hansson wrote: >> [...] >> >> > >> > 2. Add missing stuff to support multislot mode in DesignWare MMC driver. >> > * Add missing slot switch to __dw_mci_start_request() function. >> > * Refactor set_ios function: >> > a) Calculate common clock which is >> > suitable for all slots instead of directly use clock value >> > provided by mmc core. We calculate common clock as the minimum >> > among each used slot clocks. This clock is calculated in >> > dw_mci_calc_common_clock() function which is called >> > from set_ios() >> > b) Disable clock only if no other slots are ON. >> > c) Setup clock directly in set_ios() only if no other slots >> > are ON. Otherwise adjust clock in __dw_mci_start_request() >> > function before slot switch. >> > d) Move timings and bus_width setup to separate funcions. >> > * Use timing field in each slot structure instead of common field in >> > host structure. >> > * Add locks to serialize access to registers. >> >> Sorry, but this is a hack to *try* to make multi-slot work and this >> isn't sufficient. There were good reasons to why the earlier >> non-working multi slot support was removed from dw_mmc. >> >> Let me elaborate a bit for your understanding. The core uses a host >> lock (mmc_claim|release_host()) to serialize operations and commands, >> as to confirm to the SD/SDIO/(e)MMC specs. The above changes gives no >> guarantees for this. To make that work, we would need a "mmc bus lock" >> to be managed by the core. >> >> However, inventing a "mmc bus lock" would lead to other problems >> related to I/O scheduling for upper layers - it simply breaks. For >> example, I/O requests for one card/slot can then starve I/O requests >> reaching another card/slot. > > So are you saying that multi-slot support is a no go in general or it is only > applicable to DW MMC (I really doubt that's a case)? In general. > > BTW there're other controllers that seem to support multi-slot like Atmel etc. Yeah, none of those are working - it just bad attempts to try to make *something* work. Kind regards Uffe