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[209.132.180.67]) by mx.google.com with ESMTP id d10si5292915pfn.84.2018.04.20.08.22.36; Fri, 20 Apr 2018 08:22:51 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@ffwll.ch header.s=google header.b=Sgyw91MZ; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755577AbeDTPV1 (ORCPT + 99 others); Fri, 20 Apr 2018 11:21:27 -0400 Received: from mail-wr0-f195.google.com ([209.85.128.195]:37443 "EHLO mail-wr0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755546AbeDTPVQ (ORCPT ); Fri, 20 Apr 2018 11:21:16 -0400 Received: by mail-wr0-f195.google.com with SMTP id f14-v6so23989954wre.4 for ; Fri, 20 Apr 2018 08:21:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=sender:date:from:to:cc:subject:message-id:mail-followup-to :references:mime-version:content-disposition :content-transfer-encoding:in-reply-to:user-agent; bh=8GdxIu+D3KwnviAWGXiTnzHhLpYc4iEcdceM0UB6GQk=; b=Sgyw91MZlDk0oHx+NFycHU27q0K6Hswl9BaaJfn7nHo7wIqOMILnxp8b+v96N7rUNZ iKNGfwqSBXwhLFhqDp9SdLJQeL57xSs3jAGNNZ8KTR1y0iuGIrvXyilnI7CFRYZQvp+s /aihcqiLGsF7Favb6greOUB7gHcudo17uO1/E= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:date:from:to:cc:subject:message-id :mail-followup-to:references:mime-version:content-disposition :content-transfer-encoding:in-reply-to:user-agent; bh=8GdxIu+D3KwnviAWGXiTnzHhLpYc4iEcdceM0UB6GQk=; b=uZxBSNRlzCCbHJc4EuoZGMKTt/a7tp/j8JGSEcCJTCNPrWznyfbAuXmtXgJsDeu6QR NFSnGBT0QI6obeut513n/JPQq/GVu5JS2G13OCrPFcSE97pg8oNaSryfauULYSk1wNsC smk9S+MnM2H+KTgtp0dXmdzX1fwrk91juFNpmyxkyTPOqv5dT6b3Vjts8494EYNIKbHV mlQf0aLAvlTGSo2nKyiZbPCw6vyFoAyXgTl3QDnakx/4fnHBqYOLxxhu7xYw9iBJoYD0 4cVc6TPfD4vfzHdiMeBYyqaGUA98f5SH/9CQqJnBaqjIwFhzJKjByDb7yDCutXNCD9Vt qerg== X-Gm-Message-State: ALQs6tCnLlRFDzNsjDyCSye9kGJZqUq/BP6eyGoEgFP1CatM5qplbLxu f82bRgsfcEi2CD+XsLFpJATfww== X-Received: by 10.80.217.1 with SMTP id t1mr14373039edj.292.1524237674988; Fri, 20 Apr 2018 08:21:14 -0700 (PDT) Received: from phenom.ffwll.local ([2a02:168:5635:0:39d2:f87e:2033:9f6]) by smtp.gmail.com with ESMTPSA id o6sm3709844edj.31.2018.04.20.08.21.13 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 20 Apr 2018 08:21:13 -0700 (PDT) Date: Fri, 20 Apr 2018 17:21:11 +0200 From: Daniel Vetter To: Christoph Hellwig Cc: Christian =?iso-8859-1?Q?K=F6nig?= , "moderated list:DMA BUFFER SHARING FRAMEWORK" , Linux Kernel Mailing List , amd-gfx list , Jerome Glisse , dri-devel , Dan Williams , Logan Gunthorpe , "open list:DMA BUFFER SHARING FRAMEWORK" Subject: Re: [Linaro-mm-sig] [PATCH 4/8] dma-buf: add peer2peer flag Message-ID: <20180420152111.GR31310@phenom.ffwll.local> Mail-Followup-To: Christoph Hellwig , Christian =?iso-8859-1?Q?K=F6nig?= , "moderated list:DMA BUFFER SHARING FRAMEWORK" , Linux Kernel Mailing List , amd-gfx list , Jerome Glisse , dri-devel , Dan Williams , Logan Gunthorpe , "open list:DMA BUFFER SHARING FRAMEWORK" References: <20180403170645.GB5935@redhat.com> <20180403180832.GZ3881@phenom.ffwll.local> <20180416123937.GA9073@infradead.org> <20180419081657.GA16735@infradead.org> <20180420071312.GF31310@phenom.ffwll.local> <3e17afc5-7d6c-5795-07bd-f23e34cf8d4b@gmail.com> <20180420101755.GA11400@infradead.org> <20180420124625.GA31078@infradead.org> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20180420124625.GA31078@infradead.org> X-Operating-System: Linux phenom 4.15.0-1-amd64 User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Apr 20, 2018 at 05:46:25AM -0700, Christoph Hellwig wrote: > On Fri, Apr 20, 2018 at 12:44:01PM +0200, Christian K?nig wrote: > > > > What we need is an sg_alloc_table_from_resources(dev, resources, > > > > num_resources) which does the handling common to all drivers. > > > A structure that contains > > > > > > {page,offset,len} + {dma_addr+dma_len} > > > > > > is not a good container for storing > > > > > > {virt addr, dma_addr, len} > > > > > > no matter what interface you build arond it. > > > > Why not? I mean at least for my use case we actually don't need the virtual > > address. > > If you don't need the virtual address you need scatterlist even list. > > > What we need is {dma_addr+dma_len} in a consistent interface which can come > > from both {page,offset,len} as well as {resource, len}. > > Ok. > > > What I actually don't need is separate handling for system memory and > > resources, but that would we get exactly when we don't use sg_table. > > At the very lowest level they will need to be handled differently for > many architectures, the questions is at what point we'll do the > branching out. Having at least struct page also in that list with (dma_addr_t, lenght) pairs has a bunch of benefits for drivers in unifying buffer handling code. You just pass that one single list around, use the dma_addr_t side for gpu access (generally bashing it into gpu ptes). And the struct page (if present) for cpu access, using kmap or vm_insert_*. We generally ignore virt, if we do need a full mapping then we construct a vmap for that buffer of our own. If (and that would be serious amounts of work all over the tree, with lots of drivers) we come up with a new struct for gpu buffers, then I'd also add "force page alignement for everything" to the requirements list. That's another mismatch we have, since gpu buffer objects (and dma-buf) are always full pages. That mismatch motived the addition of the page-oriented sg iterators. So maybe a list of (struct page *, dma_addr_t, num_pages) would suit best, with struct page * being optional (if it's a resource, or something else that the kernel core mm isn't aware of). But that only has benefits if we really roll it out everywhere, in all the subsystems and drivers, since if we don't we've made the struct pages ** <-> sgt conversion fun only worse by adding a 3 representation of gpu buffer object backing storage. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch