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From:   Diego Viola <diego.viola@gmail.com>
Date:   Mon, 23 Apr 2018 08:49:25 -0300
Message-ID: <CA+ToGPHA+Y=0PtiXF7fTSqSgwtzsJy3Z=U1i3xiW9jkzQGsXWQ@mail.gmail.com>
Subject: Re: Experiencing freezes with kernel 4.16.3 on a desktop with E5500
 CPU (bisect included)
To:     Peter Zijlstra <peterz@infradead.org>
Cc:     linux-kernel@vger.kernel.org, tglx@linutronix.de,
        len.brown@intel.com, rui.zhang@intel.com,
        "Rafael J. Wysocki" <rjw@rjwysocki.net>
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On Mon, Apr 23, 2018 at 8:48 AM, Peter Zijlstra <peterz@infradead.org> wrote:
> On Mon, Apr 23, 2018 at 08:23:24AM -0300, Diego Viola wrote:
>> > That's a Core2 era chip; does it actually have stable TSC ?
>>
>> I'm not sure.
>
> dmesg | grep -i tsc
>
> should be able to tell you.

[diego@dualcore ~]$ dmesg | grep -i tsc
[    0.000000] tsc: Fast TSC calibration using PIT
[    0.016666] tsc: Fast TSC calibration using PIT
[    0.019999] tsc: Detected 2793.087 MHz processor
[    0.019999] clocksource: tsc-early: mask: 0xffffffffffffffff
max_cycles: 0x2842be30f1f, max_idle_ns: 440795236296 ns
[    0.162058] clocksource: Switched to clocksource tsc-early
[    0.300076] tsc: Marking TSC unstable due to TSC halts in idle
[diego@dualcore ~]$