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[209.132.180.67]) by mx.google.com with ESMTP id u186si4098470pgc.67.2018.04.23.08.22.09; Mon, 23 Apr 2018 08:22:24 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755756AbeDWPVA (ORCPT + 99 others); Mon, 23 Apr 2018 11:21:00 -0400 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:16799 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755525AbeDWPUy (ORCPT ); Mon, 23 Apr 2018 11:20:54 -0400 Received: from pps.filterd (m0046668.ppops.net [127.0.0.1]) by mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w3NFJFl7019322; Mon, 23 Apr 2018 17:20:25 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2hftrwkjy9-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Mon, 23 Apr 2018 17:20:25 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id DBAC434; Mon, 23 Apr 2018 15:20:24 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas24.st.com [10.75.90.94]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id A50E24DD1; Mon, 23 Apr 2018 15:20:24 +0000 (GMT) Received: from SAFEX1HUBCAS21.st.com (10.75.90.44) by Safex1hubcas24.st.com (10.75.90.94) with Microsoft SMTP Server (TLS) id 14.3.361.1; Mon, 23 Apr 2018 17:20:24 +0200 Received: from localhost (10.201.23.65) by Webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.361.1; Mon, 23 Apr 2018 17:20:24 +0200 From: Lionel Debieve To: Alexandre Torgue , Maxime Coquelin , Rob Herring , Mark Rutland , Russell King CC: , , Subject: [PATCH 1/4] ARM: dts: stm32: Add RNG support on stm32mp157c Date: Mon, 23 Apr 2018 17:19:44 +0200 Message-ID: <20180423151947.2526-2-lionel.debieve@st.com> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180423151947.2526-1-lionel.debieve@st.com> References: <20180423151947.2526-1-lionel.debieve@st.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.201.23.65] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2018-04-23_05:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch add RNG instance of the stm32mp157c SoC Signed-off-by: Lionel Debieve --- arch/arm/boot/dts/stm32mp157c.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp157c.dtsi index bc3eddc3eda6..bf00885971b3 100644 --- a/arch/arm/boot/dts/stm32mp157c.dtsi +++ b/arch/arm/boot/dts/stm32mp157c.dtsi @@ -5,6 +5,7 @@ */ #include #include +#include / { #address-cells = <1>; @@ -167,6 +168,14 @@ #reset-cells = <1>; }; + rng1: rng@54003000 { + compatible = "st,stm32-rng"; + reg = <0x54003000 0x400>; + clocks = <&rcc RNG1_K>; + resets = <&rcc RNG1_R>; + status = "disabled"; + }; + usart1: serial@5c000000 { compatible = "st,stm32h7-uart"; reg = <0x5c000000 0x400>; -- 2.15.1