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[209.132.180.67]) by mx.google.com with ESMTP id 189si9636031pgc.616.2018.04.23.08.56.48; Mon, 23 Apr 2018 08:57:02 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail (test mode) header.i=@8bytes.org header.s=mail-1 header.b=Fo3j9tSD; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=8bytes.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932109AbeDWPzB (ORCPT + 99 others); Mon, 23 Apr 2018 11:55:01 -0400 Received: from 8bytes.org ([81.169.241.247]:60690 "EHLO theia.8bytes.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755619AbeDWPrz (ORCPT ); Mon, 23 Apr 2018 11:47:55 -0400 Received: by theia.8bytes.org (Postfix, from userid 1000) id 4FCE884D; Mon, 23 Apr 2018 17:47:44 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=8bytes.org; s=mail-1; t=1524498465; bh=RnczbmWr+hc7ttIpZ+GAkK7nnw77YGAmTdIAi8FQbM8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Fo3j9tSDv2rhXE5dIODoXB7b/eUuilYAOaInBG49BSNVad/h73BO8JE91YsK5IJCm By1viR2bFIq28L8w3YuVA7yyVAo5eGJqqieJRJyJDeY3+tqmvUX50pHTfTmbIuoJDo hETEjxBIs3X1kakAAxAJurVSBnrZoF5p2uBkJV8DiHaHP6KWgbJw62+SYFNw10SPnW cVC5JN1yCEAwuULPKjPwFxD3DC81no+reEa9rOQHqmeMm0FhGfOJVlEG2J9EuAJCsG z6Y3AlmNqwv4EJ0IggimomlcyQpb7JqXQqncs3vS5SYGKN62RFpYeJ9skEG4onAyro 50iQ7s89kIBIw== From: Joerg Roedel To: Thomas Gleixner , Ingo Molnar , "H . Peter Anvin" Cc: x86@kernel.org, linux-kernel@vger.kernel.org, linux-mm@kvack.org, Linus Torvalds , Andy Lutomirski , Dave Hansen , Josh Poimboeuf , Juergen Gross , Peter Zijlstra , Borislav Petkov , Jiri Kosina , Boris Ostrovsky , Brian Gerst , David Laight , Denys Vlasenko , Eduardo Valentin , Greg KH , Will Deacon , aliguori@amazon.com, daniel.gruss@iaik.tugraz.at, hughd@google.com, keescook@google.com, Andrea Arcangeli , Waiman Long , Pavel Machek , "David H . Gutteridge" , jroedel@suse.de, joro@8bytes.org Subject: [PATCH 10/37] x86/entry/32: Handle Entry from Kernel-Mode on Entry-Stack Date: Mon, 23 Apr 2018 17:47:13 +0200 Message-Id: <1524498460-25530-11-git-send-email-joro@8bytes.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1524498460-25530-1-git-send-email-joro@8bytes.org> References: <1524498460-25530-1-git-send-email-joro@8bytes.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Joerg Roedel It can happen that we enter the kernel from kernel-mode and on the entry-stack. The most common way this happens is when we get an exception while loading the user-space segment registers on the kernel-to-userspace exit path. The segment loading needs to be done after the entry-stack switch, because the stack-switch needs kernel %fs for per_cpu access. When this happens, we need to make sure that we leave the kernel with the entry-stack again, so that the interrupted code-path runs on the right stack when switching to the user-cr3. We do this by detecting this condition on kernel-entry by checking CS.RPL and %esp, and if it happens, we copy over the complete content of the entry stack to the task-stack. This needs to be done because once we enter the exception handlers we might be scheduled out or even migrated to a different CPU, so that we can't rely on the entry-stack contents. We also leave a marker in the stack-frame to detect this condition on the exit path. On the exit path the copy is reversed, we copy all of the remaining task-stack back to the entry-stack and switch to it. Signed-off-by: Joerg Roedel --- arch/x86/entry/entry_32.S | 116 +++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 115 insertions(+), 1 deletion(-) diff --git a/arch/x86/entry/entry_32.S b/arch/x86/entry/entry_32.S index e2621bf..b3477ff 100644 --- a/arch/x86/entry/entry_32.S +++ b/arch/x86/entry/entry_32.S @@ -299,6 +299,9 @@ * copied there. So allocate the stack-frame on the task-stack and * switch to it before we do any copying. */ + +#define CS_FROM_ENTRY_STACK (1 << 31) + .macro SWITCH_TO_KERNEL_STACK ALTERNATIVE "", "jmp .Lend_\@", X86_FEATURE_XENPV @@ -320,6 +323,16 @@ /* Load top of task-stack into %edi */ movl TSS_entry_stack(%edi), %edi + /* + * Clear upper bits of the CS slot in pt_regs in case hardware + * didn't clear it for us + */ + andl $(0x0000ffff), PT_CS(%esp) + + /* Special case - entry from kernel mode via entry stack */ + testl $SEGMENT_RPL_MASK, PT_CS(%esp) + jz .Lentry_from_kernel_\@ + /* Bytes to copy */ movl $PTREGS_SIZE, %ecx @@ -333,8 +346,8 @@ */ addl $(4 * 4), %ecx -.Lcopy_pt_regs_\@: #endif +.Lcopy_pt_regs_\@: /* Allocate frame on task-stack */ subl %ecx, %edi @@ -350,6 +363,56 @@ cld rep movsl + jmp .Lend_\@ + +.Lentry_from_kernel_\@: + + /* + * This handles the case when we enter the kernel from + * kernel-mode and %esp points to the entry-stack. When this + * happens we need to switch to the task-stack to run C code, + * but switch back to the entry-stack again when we approach + * iret and return to the interrupted code-path. This usually + * happens when we hit an exception while restoring user-space + * segment registers on the way back to user-space. + * + * When we switch to the task-stack here, we can't trust the + * contents of the entry-stack anymore, as the exception handler + * might be scheduled out or moved to another CPU. Therefore we + * copy the complete entry-stack to the task-stack and set a + * marker in the iret-frame (bit 31 of the CS dword) to detect + * what we've done on the iret path. + * + * On the iret path we copy everything back and switch to the + * entry-stack, so that the interrupted kernel code-path + * continues on the same stack it was interrupted with. + * + * Be aware that an NMI can happen anytime in this code. + * + * %esi: Entry-Stack pointer (same as %esp) + * %edi: Top of the task stack + */ + + /* Calculate number of bytes on the entry stack in %ecx */ + movl %esi, %ecx + + /* %ecx to the top of entry-stack */ + andl $(MASK_entry_stack), %ecx + addl $(SIZEOF_entry_stack), %ecx + + /* Number of bytes on the entry stack to %ecx */ + sub %esi, %ecx + + /* Mark stackframe as coming from entry stack */ + orl $CS_FROM_ENTRY_STACK, PT_CS(%esp) + + /* + * %esi and %edi are unchanged, %ecx contains the number of + * bytes to copy. The code at .Lcopy_pt_regs_\@ will allocate + * the stack-frame on task-stack and copy everything over + */ + jmp .Lcopy_pt_regs_\@ + .Lend_\@: .endm @@ -408,6 +471,56 @@ .endm /* + * This macro handles the case when we return to kernel-mode on the iret + * path and have to switch back to the entry stack. + * + * See the comments below the .Lentry_from_kernel_\@ label in the + * SWITCH_TO_KERNEL_STACK macro for more details. + */ +.macro PARANOID_EXIT_TO_KERNEL_MODE + + /* + * Test if we entered the kernel with the entry-stack. Most + * likely we did not, because this code only runs on the + * return-to-kernel path. + */ + testl $CS_FROM_ENTRY_STACK, PT_CS(%esp) + jz .Lend_\@ + + /* Unlikely slow-path */ + + /* Clear marker from stack-frame */ + andl $(~CS_FROM_ENTRY_STACK), PT_CS(%esp) + + /* Copy the remaining task-stack contents to entry-stack */ + movl %esp, %esi + movl PER_CPU_VAR(cpu_tss_rw + TSS_sp0), %edi + + /* Bytes on the task-stack to ecx */ + movl PER_CPU_VAR(cpu_current_top_of_stack), %ecx + subl %esi, %ecx + + /* Allocate stack-frame on entry-stack */ + subl %ecx, %edi + + /* + * Save future stack-pointer, we must not switch until the + * copy is done, otherwise the NMI handler could destroy the + * contents of the task-stack we are about to copy. + */ + movl %edi, %ebx + + /* Do the copy */ + shrl $2, %ecx + cld + rep movsl + + /* Safe to switch to entry-stack now */ + movl %ebx, %esp + +.Lend_\@: +.endm +/* * %eax: prev task * %edx: next task */ @@ -769,6 +882,7 @@ restore_all: restore_all_kernel: TRACE_IRQS_IRET + PARANOID_EXIT_TO_KERNEL_MODE RESTORE_REGS 4 jmp .Lirq_return -- 2.7.4