Received: by 10.192.165.148 with SMTP id m20csp4250758imm; Mon, 23 Apr 2018 22:43:39 -0700 (PDT) X-Google-Smtp-Source: AIpwx4/kbgAVNmVIxUQvcg93msEhEB5gW3Mo66/ji4kkbdMth9bMziI6vNZ+LyvznU6WGyOiTidA X-Received: by 10.98.99.4 with SMTP id x4mr22441754pfb.179.1524548619063; Mon, 23 Apr 2018 22:43:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1524548619; cv=none; d=google.com; s=arc-20160816; b=GoemJZOhCK6I05Ud8xNSQ6slJnzVwwJPuhW3mq6Tm6tleiWhaDLYauZpepqlubUHSJ Y1zlgHYlZGGgSZqCli4ZrwxVRxrKgbortmqTP7pLrGMrKlSwGHvonUL3jSd5HEwlZiDH X+uOxn7CmMvQpRGwsRHvgOvw8i+qv/1lOql/mUw4EBC/T7uEgYdBEQprUX6KE0gfGhmq bGTd00RRE2BlP3sWk8KY2l2/9LnWx3fHlNbkLq2K3qKwv0LePnArG1Xa43ZmwKb++6Tk 9FLirl3qYo+T6Qjy+H39kR9jvRf8ivAyBWqPGZR+gmyXXB0ONtrXUMAwu7guI8AI55Jk yeFw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :arc-authentication-results; bh=exEnBEtq4sdM6zwTxrD9FzxOuI0GpAQECO5UX8P0jV4=; b=HtCjvyDCVNwFxVblwiXM1AU1AzosgWg1tyKaaKDyU0aD+oTmyQ/AcTHDDKJlQS6EYf PXSibJAVSGARphMVxER+1+bXsWrZ5GJ+jbAAenrAfhfTC01kq+EjOz/I+3T3aBFJn3Un aBdlTiZMgF1LR+PW8zcJY/OFqY6poxE11kQ5TLHNSROMOF8VZ79A9qAqahrwqP9+QNwE oq66GEffxvXQBtlO6O2x294lENYrDwqySmBjhHMwjU1sh6SxfbGx+UAJeJsuMu7KAnCH GASasRVHfiU/OQ7ObwQcwJZXRnMTBAkUfjeKiUwrPkTVupgOUU86PCc7h/xkcIGm4iDQ 95zw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id q22si10063946pfi.282.2018.04.23.22.43.23; Mon, 23 Apr 2018 22:43:39 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751563AbeDXEQK (ORCPT + 99 others); Tue, 24 Apr 2018 00:16:10 -0400 Received: from ozlabs.org ([203.11.71.1]:48415 "EHLO ozlabs.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750962AbeDXEQI (ORCPT ); Tue, 24 Apr 2018 00:16:08 -0400 Received: by ozlabs.org (Postfix, from userid 1034) id 40VVPf2gTzz9s0v; Tue, 24 Apr 2018 14:16:06 +1000 (AEST) From: Michael Ellerman To: linuxppc-dev@ozlabs.org Cc: npiggin@gmail.com, msuchanek@suse.de, linux-kernel@vger.kernel.org Subject: [PATCH 1/6] powerpc/64s: Add barrier_nospec Date: Tue, 24 Apr 2018 14:15:54 +1000 Message-Id: <20180424041559.32410-1-mpe@ellerman.id.au> X-Mailer: git-send-email 2.14.1 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Michal Suchanek A no-op form of ori (or immediate of 0 into r31 and the result stored in r31) has been re-tasked as a speculation barrier. The instruction only acts as a barrier on newer machines with appropriate firmware support. On older CPUs it remains a harmless no-op. Implement barrier_nospec using this instruction. mpe: The semantics of the instruction are believed to be that it prevents execution of subsequent instructions until preceding branches have been fully resolved and are no longer executing speculatively. There is no further documentation available at this time. Signed-off-by: Michal Suchanek Signed-off-by: Michael Ellerman --- mpe: Make it Book3S64 only, update comment & change log, add a memory clobber to the asm. --- arch/powerpc/include/asm/barrier.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/powerpc/include/asm/barrier.h b/arch/powerpc/include/asm/barrier.h index c7c63959ba91..e582d2c88092 100644 --- a/arch/powerpc/include/asm/barrier.h +++ b/arch/powerpc/include/asm/barrier.h @@ -76,6 +76,21 @@ do { \ ___p1; \ }) +#ifdef CONFIG_PPC_BOOK3S_64 +/* + * Prevent execution of subsequent instructions until preceding branches have + * been fully resolved and are no longer executing speculatively. + */ +#define barrier_nospec_asm ori 31,31,0 + +// This also acts as a compiler barrier due to the memory clobber. +#define barrier_nospec() asm (stringify_in_c(barrier_nospec_asm) ::: "memory") + +#else /* !CONFIG_PPC_BOOK3S_64 */ +#define barrier_nospec_asm +#define barrier_nospec() +#endif + #include #endif /* _ASM_POWERPC_BARRIER_H */ -- 2.14.1