Received: by 10.192.165.148 with SMTP id m20csp328846imm; Tue, 24 Apr 2018 23:33:58 -0700 (PDT) X-Google-Smtp-Source: AIpwx4//cQGjh5I4cgJOCbKpja1K6m9knACYkkVSc4sQ4qYXutywmd3/i+0NFtTOeO2WDmepCIKG X-Received: by 10.98.196.133 with SMTP id h5mr23122216pfk.86.1524638037987; Tue, 24 Apr 2018 23:33:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1524638037; cv=none; d=google.com; s=arc-20160816; b=bB6Har4/sCJLX9nA7DWCxLarykd7wIuxJHfK/c0X+7eaArBL9A8sFRX4hGZYR4nNgN F33/6swPU381G8gDeMxwpVoCo7M2kV95yqsoXtN3DjYKrFpPUV1GrBOHa81jDAe6FZWA 2nzP/f+g63QqBJhm1ArOtfzBVhgFQK2pM2PlaDFhZZJLCJiHNHCNnxBCDVAsNTyvU8TY 2+M4OLVA/SFXwJ1RE/B+h+KPXhKpDfhLSGkx9+6Ocmv1dzPTQOy1beGE9JET9ZT5lkU1 LqNuwXROGJGt5ymoCtrnXWKlUqNaT8CWt/VDuQVXpuy3Rp/EqSKeBUVIYvPxh8snrcTK GS6Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:message-id:references :in-reply-to:subject:cc:to:from:date:content-transfer-encoding :mime-version:dkim-signature:dkim-signature :arc-authentication-results; bh=uFZ/h1zzfN7xFWT1VYe+/4U3YDaw+VnQ9noTnr13MCU=; b=figF4s5MX/pwV/k0qlcd+ahXaO8LTl5vJJpsFjyswq4bal3tfGvNpSO4G9s+9si7iE 7kIu/cmjWmpswJN60RvPzpVbd13rVIetJ6OM+3G157X5FZuh3PNv+qWWx7fYSwpDm6VH w1yMsCqZ5mWxJ6qx/jj8nfclVGp1bd1GNM2V30fRyAMPpcc/wUGYyNp9Ju8htQp232yC 6WPsP2v6c4rUC90EuAzCb+bisyFbGmAKhQ/qwS5ERqFj05ozYjNlVs33EC3Lhgp9mlWe gesWW7cVU0c2N3VIJsqgbG7QSMICk6kZbaN8X0ceXG8WTyWtlrmrS0sIzO7NPLSs4++p iboA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=bIT8kb9b; dkim=pass header.i=@codeaurora.org header.s=default header.b=Q/hwRxHr; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 65si13558139pgh.248.2018.04.24.23.33.43; Tue, 24 Apr 2018 23:33:57 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=bIT8kb9b; dkim=pass header.i=@codeaurora.org header.s=default header.b=Q/hwRxHr; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751363AbeDYGcd (ORCPT + 99 others); Wed, 25 Apr 2018 02:32:33 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:38088 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750929AbeDYGcb (ORCPT ); Wed, 25 Apr 2018 02:32:31 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 759C460F74; Wed, 25 Apr 2018 06:32:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1524637950; bh=uDyHVZDuYM+pKQ9YCRYgUUc2Ve5Wldsq3uaaIAuaEg8=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=bIT8kb9bH2iQBAqNehSJpZjbJnpuKYz7H5nZmN71gcNm7Q/mHqpCBIeQ2roT9ZKwo KxjEmJasowtF+xL12e4s+4sQDvwk+d2Rmij1i9nnu0QCrou6cjh0A5C2wC1jRpKExS UvCov6JWb/wuR3ELb/bAu1ZvtPfplMUsa/vMBEUw= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED,T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from mail.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id 2564C607DD; Wed, 25 Apr 2018 06:32:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1524637949; bh=uDyHVZDuYM+pKQ9YCRYgUUc2Ve5Wldsq3uaaIAuaEg8=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=Q/hwRxHrit1TtYrx4O6J5Ut/l4yZg0Ozz0KnMAWW76PjgR4qhNVcd4sxCoRxUTXtP pmzdGkG2St6UVCXZ3BPdTL4Pj+FKzW+VoKpeuSIM4+Mu1+VZh0MPsr4jkmLfJnpRnm xgPm5iPREDzmucTJzHjHZxxMWKmpSxYu20bdsemM= MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit Date: Wed, 25 Apr 2018 12:02:29 +0530 From: Abhishek Sahu To: Miquel Raynal Cc: Boris Brezillon , Archit Taneja , Richard Weinberger , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Marek Vasut , linux-mtd@lists.infradead.org, Cyrille Pitchen , Andy Gross , Brian Norris , David Woodhouse Subject: Re: [PATCH 8/9] mtd: nand: qcom: helper function for raw read In-Reply-To: <20180423085817.74e56091@xps13> References: <1522845745-6624-1-git-send-email-absahu@codeaurora.org> <1522845745-6624-9-git-send-email-absahu@codeaurora.org> <20180410114428.68d59c8d@xps13> <20180422181929.65d42ca8@xps13> <484485e160af41cf062549938c53d078@codeaurora.org> <20180423085817.74e56091@xps13> Message-ID: <892130678772dca7116bd8dcdcb3cc44@codeaurora.org> X-Sender: absahu@codeaurora.org User-Agent: Roundcube Webmail/1.2.5 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2018-04-23 12:28, Miquel Raynal wrote: > Hi Abhishek, > > On Mon, 23 Apr 2018 11:58:42 +0530, Abhishek Sahu > wrote: > >> On 2018-04-22 21:49, Miquel Raynal wrote: >> > Hi Abhishek, >> > > On Thu, 12 Apr 2018 12:36:42 +0530, Abhishek Sahu >> > wrote: >> > >> On 2018-04-10 15:14, Miquel Raynal wrote: >> >> > Hi Abhishek, >> >> > > On Wed, 4 Apr 2018 18:12:24 +0530, Abhishek Sahu >> >> > wrote: >> >> > >> This patch does minor code reorganization for raw reads. >> >> >> Currently the raw read is required for complete page but for >> >> >> subsequent patches related with erased codeword bit flips >> >> >> detection, only few CW should be read. So, this patch adds >> >> >> helper function and introduces the read CW bitmask which >> >> >> specifies which CW reads are required in complete page. >> >> > > I am not sure this is the right approach for subpage reads. If the >> >> > controller supports it, you should just enable it in chip->options. >> >> > >> >> Thanks Miquel. >> >> >> It is internal to this file only. This patch makes one static helper >> >> function which provides the support to read subpages. >> > > Drivers should expose raw helpers, why keeping this helper static then? >> > >> >> >> >> Signed-off-by: Abhishek Sahu >> >> >> --- >> >> >> drivers/mtd/nand/qcom_nandc.c | 186 >> +++++++++++++++++++++++++----------------- >> >> >> 1 file changed, 110 insertions(+), 76 deletions(-) >> >> >> >> diff --git a/drivers/mtd/nand/qcom_nandc.c >> b/drivers/mtd/nand/qcom_nandc.c >> >> >> index 40c790e..f5d1fa4 100644 >> >> >> --- a/drivers/mtd/nand/qcom_nandc.c >> >> >> +++ b/drivers/mtd/nand/qcom_nandc.c >> >> >> @@ -1590,6 +1590,114 @@ static int check_flash_errors(struct >> qcom_nand_host *host, int cw_cnt) >> >> >> } >> >> >> >> /* >> >> >> + * Helper to perform the page raw read operation. The read_cw_mask >> will be >> >> >> + * used to specify the codewords for which the data should be read. >> The >> >> >> + * single page contains multiple CW. Sometime, only few CW data is >> required >> >> >> + * in complete page. Also, start address will be determined with >> >> >> + * this CW mask to skip unnecessary data copy from NAND flash device. >> Then, >> >> >> + * actual data copy from NAND controller to data buffer will be done >> only >> >> >> + * for the CWs which have the mask set. >> >> >> + */ >> >> >> +static int >> >> >> +nandc_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip, >> >> >> + u8 *data_buf, u8 *oob_buf, >> >> >> + int page, unsigned long read_cw_mask) >> >> >> +{ >> >> >> - free_descs(nandc); >> >> >> - >> >> >> - if (!ret) >> >> >> - ret = check_flash_errors(host, ecc->steps); >> >> >> - >> >> >> - return 0; >> >> >> + return nandc_read_page_raw(mtd, chip, buf, chip->oob_poi, page, >> >> >> + BIT(chip->ecc.steps) - 1); >> >> > > I don't understand this. chip->ecc.steps is constant, right? So you >> >> > always ask for the same subpage? >> >> >> We need to do raw read for subpages in which we got uncorrectable >> >> error in next patch for erased page bitflip detection. This patch >> does >> >> reorganization of raw read and moves common code in helper function >> >> nandc_read_page_raw. >> >> >> For nomral raw read, all the subpages will be read so >> >> BIT(chip->ecc.steps) - 1 is used for qcom_nandc_read_page_raw. >> >> >> While for erased page raw read, only those sub pages will be >> >> read for which the controller gives the uncorrectable error. >> > > Still not okay: the driver should expose a way to do raw reads no >> > matter the length and the start and you should use that in a generic >> > way. >> > >> Thanks Miquel. >> I will explore regarding that. >> Looks like, we can some helper like read_subpage. > > Of course, when you implement raw accessors you can have static helpers > to clarify the code. > Hi Miquel, I checked regarding generic function. Normally the other NAND controller stores the data in main area and ecc bytes in oob area. So if page size is 2048+64 then 2048 data bytes will go in main area followed by ECC bytes Main | OOB ------------------------------------ D1 D2...........D2048|E1..........E64 The QCOM nand contoller follows different layout in which this 2048+64 is internally divided in 528 bytes codeword so it will come to 4 codewords. Each codeword contains 516 bytes followed by ECC parity bytes. Also in at 0x1f0 offset in each CW, the bad block marker is stored. so each CW contains badblock marker also. The avilable OOB bytes are 16 which is also protected by ECC. 516 * 4 = 2048 data bytes + 16 available oob bytes. So for QCOM layout, it will be something lile 0 D1.........D495 B1 D496....D516 E1...E7 U1..U4 0x210 D517......D1012 B2 D1016..D1032 E8...E14 U5..U8 0x420 D1033.....D1528 B3 D1529..D1548 E15..E21 U9..U12 0x630 D1549.....D2044 B4 D2045..D2048 O1...O16 E22 E28 U13..U16 Where D - Data bytes B - BBM bytes E - ECC parity bytes U - Unused bytes O - Avilable OOB bytes Now, the raw read expect data to be returned in buffer in the form of D1.....D2048 B1 E1...E7 U1..U4 B2 E8...E14 U5..U8 B3 E15..E21 U9..U12 B4 O1...O16 E22 E28 U13..U16 Now, the puporose of that helper function is read selected codewords. This codeword is QCOM specific and other controller normally doesn't follow this kind of layout. Now If we make generic fuction for subpgage raw read with any start and length then that function we can't use for erased page bitflip detection. If we give the start as 0 with length 528 then our requirement is to get 516 data bytes in data buffer and 12 bytes in OOB buffer but according to standard operations, it will be interpreted as all data bytes from D1..D528 so that helper function is to read selected Codewords from QCOM NAND controller. This Codeword is different from subpages Regarding more info for layout, you can refer comment in https://elixir.bootlin.com/linux/latest/source/drivers/mtd/nand/qcom_nandc.c#L2191 Thanks, Abhishek