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[209.132.180.67]) by mx.google.com with ESMTP id 70si1264266pfu.274.2018.04.25.02.22.03; Wed, 25 Apr 2018 02:22:18 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=chSPLy9V; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751369AbeDYJU6 (ORCPT + 99 others); Wed, 25 Apr 2018 05:20:58 -0400 Received: from fllnx210.ext.ti.com ([198.47.19.17]:54991 "EHLO fllnx210.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751069AbeDYJUy (ORCPT ); Wed, 25 Apr 2018 05:20:54 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by fllnx210.ext.ti.com (8.15.1/8.15.1) with ESMTP id w3P9KEsm017668; Wed, 25 Apr 2018 04:20:14 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1524648014; bh=0BPDC9CkT28xIJQbTnawfEUSow6o3M5tJnSakL4SwpI=; h=Subject:To:CC:References:From:Date:In-Reply-To; b=chSPLy9VoAh9lNrsnXNiAgS5t55kSJxy1pGCRwW1WU6MUarrqCq5hyeruk/nd1/Qh 06xMIB5ayU/BR4J5UxWycgWlgWhQTqjeVFBrfPliaBbMnWmbSVIDrh4UQYYKMElawm R5eURnwOfBHmB3OZrvL6IoX6//NQQMv9gqJaJLo4= Received: from DLEE113.ent.ti.com (dlee113.ent.ti.com [157.170.170.24]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id w3P9KEqn028573; Wed, 25 Apr 2018 04:20:14 -0500 Received: from DLEE111.ent.ti.com (157.170.170.22) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Wed, 25 Apr 2018 04:20:14 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Wed, 25 Apr 2018 04:20:14 -0500 Received: from [172.24.190.172] (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id w3P9KB8n021862; Wed, 25 Apr 2018 04:20:12 -0500 Subject: Re: [RESEND PATCH v2 3/4] ARM: davinci: add aemif & nand support to da850-lcdk in legacy mode To: Bartosz Golaszewski CC: Kevin Hilman , Russell King , Santosh Shilimkar , Linux ARM , Linux Kernel Mailing List , Bartosz Golaszewski References: <20180417102917.7794-1-brgl@bgdev.pl> <20180417102917.7794-4-brgl@bgdev.pl> From: Sekhar Nori Message-ID: <9c1cd548-29a1-8f4a-d05c-ec4884f60b72@ti.com> Date: Wed, 25 Apr 2018 14:50:11 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.7.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wednesday 25 April 2018 02:44 PM, Bartosz Golaszewski wrote: > 2018-04-17 16:09 GMT+02:00 Sekhar Nori : >> On Tuesday 17 April 2018 03:59 PM, Bartosz Golaszewski wrote: >>> From: Bartosz Golaszewski >>> >>> We now have support for aemif & nand from board files. As an example >>> add support for nand to da850-lcdk in legacy mode. >> >> Hawkboard is a separate board of its own, although closely related to >> LCDK. Lets refer to it as hawkboard itself, instead of "LCDK in legacy >> mode". So: >> >> ARM: davinci: omapl138-hawk: ... >> >>> >>> Signed-off-by: Bartosz Golaszewski >>> --- >>> arch/arm/mach-davinci/board-omapl138-hawk.c | 132 ++++++++++++++++++++ >>> 1 file changed, 132 insertions(+) >>> >>> diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c >>> index 6c997c59a3cd..9c3de56b54e4 100644 >>> --- a/arch/arm/mach-davinci/board-omapl138-hawk.c >>> +++ b/arch/arm/mach-davinci/board-omapl138-hawk.c >>> @@ -16,6 +16,11 @@ >>> #include >>> #include >>> #include >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> #include >>> >>> #include >>> @@ -162,6 +167,129 @@ static __init void omapl138_hawk_mmc_init(void) >>> gpiod_remove_lookup_table(&mmc_gpios_table); >>> } >>> >>> +static struct mtd_partition omapl138_hawk_nandflash_partition[] = { >>> + { >>> + .name = "u-boot env", >>> + .offset = 0, >>> + .size = SZ_128K, >>> + .mask_flags = MTD_WRITEABLE, >>> + }, >>> + { >>> + .name = "u-boot", >>> + .offset = MTDPART_OFS_APPEND, >>> + .size = SZ_128K, >> >> Can you make it 512K as it is in da850-lcdk.dts ? >> >>> + .mask_flags = MTD_WRITEABLE, >>> + }, >>> + { >>> + .name = "free space", >>> + .offset = MTDPART_OFS_APPEND, >>> + .size = MTDPART_SIZ_FULL, >>> + .mask_flags = 0, >>> + }, >>> +}; >> >>> +static struct aemif_abus_data omapl138_hawk_aemif_abus_data[] = { >>> + { >>> + .cs = 3, >>> + } >>> +}; >>> + >>> +static struct platform_device omapl138_hawk_aemif_devices[] = { >>> + { >>> + .name = "davinci_nand", >>> + .id = 1, >> >> Is there a reason for .id to be set to 1 here? Ideally it should be -1, >> I think since there is a single NAND on the board. >> > > The davinci nand driver uses pdev->id as the chipselect number. I > guess this should be in the platform data. I'll send a patch for that. I remember that now. No need to change that, I think. Just a comment here would suffice. Thanks, Sekhar