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Date:   Thu, 26 Apr 2018 13:56:24 +0200 (CEST)
From:   Thomas Gleixner <tglx@linutronix.de>
To:     David Wang <davidwang@zhaoxin.com>
cc:     mingo@redhat.com, hpa@zytor.com, gregkh@linuxfoundation.org,
        x86@kernel.org, linux-kernel@vger.kernel.org,
        brucechang@via-alliance.com, cooperyan@zhaoxin.com,
        qiyuanwang@zhaoxin.com, benjaminpan@viatech.com,
        lukelin@viacpu.com, timguo@zhaoxin.com
Subject: Re: [PATCH v3] report correct CPU/cache topology
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On Thu, 26 Apr 2018, David Wang wrote:

> Centaur CPUs enumerate the cache topology in the same way as Intel CPUs,
> but the function is unused so far.
> The Centaur init code also misses to initialize x86_info::max_cores, so
> the CPU topology can't be described correctly.
> 
> Initialize x86_info::max_cores and invoke init_intel_cachinfo() to make
> CPU and cache topology information avaliable and correct

Now that looks pretty good.

> Signed-off-by: David Wang <davidwang@zhaoxin.com>
> 
> Changes from v2 to v3:
> *1 define new detect_num_cpu_cores() in common.c to replace the original
> intel_num_cpu_cores;  
> *2 move cpu_detect_cache_sizes inside init_intel_cacheinfo.

But I asked for that being a separate patch with a separate changelog. And
the intel_cache_info() change wants to be in a separate patch as well. Then
the third patch is the one which makes use of these changes for
centaur.

Please read review comments carefully and rather ask when you have doubts
about the meaning.

Thanks,

	tglx