Received: by 10.192.165.148 with SMTP id m20csp436782imm; Fri, 27 Apr 2018 01:17:43 -0700 (PDT) X-Google-Smtp-Source: AB8JxZotzSMuc2P84Gv6j2DCnUDilO4VUo2onqTE03tS2jjizM47UpRCkEYPhAr2ztWTsKPn/TGc X-Received: by 2002:a65:6306:: with SMTP id g6-v6mr1283224pgv.173.1524817062902; Fri, 27 Apr 2018 01:17:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1524817062; cv=none; d=google.com; s=arc-20160816; b=avdmFCaoy7oL6W4QjbgHim/Rh3ahEBIGYMRxaoVRuJ7Uzi/Pp3i5gI9z2urMx5NB/G Fltg5/K1yW/B+FbGzjMdv/Z/fntxAVdMt9qWVWZUcXpoCikx8JF43G97+oIjqPnTsn2E owUPuLgZPj2r/xG/pH/RZsqbqXXcUalwYpLIo48dDldoi+GYdx+FVm9ls2t9SIyS9MFh GPj+xwEonDN1W++k0LnSkL1PrGPyAOzRO6rGXujwDNw54hYZRtBgZS3ECy6VptVmWV2d gv4dM4huc8geZAbOEoda2iCBSfeS8TwMV80J5OKzvIj6h4/csdqUr7TuyHXAoKVnQ0QZ ZGhg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=UZ7ocaTdmoacTSmpdAcrUmC3IMJccDwx8AzHTe3qbxw=; b=aijHhW8KfxuJ4mj2zk/O/L1sAm1ryYoxv4EFuy2isx93cd4YSLCVWb/pd/Z9wzxMtU 5fSKY7t3FUNmffewgpN1rB/bV2w20igzLTiWnmJKOrbH18ZN4Pg2z0aGNxQH17CxdD2t ON7Pl1qOz37wEvmghVFpuEW7GPusjC44VY3eoci2aBhRav4Xy2vQTKi5f+cnUlQr26Z7 A9zK6TNMFKG549EeCkPiKyEAUJQuEigemRcoGSxP17ZHl9peC6zC6GnLmvAkUQe0MGXt m+5PIy2w59tyAyfKUVe3WgN4ley34MjMUj+1hjP2NQDNsh2Tp5oZXhsO+kkkatF8SvfL Y4WA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id x10-v6si849504plm.5.2018.04.27.01.17.28; Fri, 27 Apr 2018 01:17:42 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757731AbeD0IPZ (ORCPT + 99 others); Fri, 27 Apr 2018 04:15:25 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:42143 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1757689AbeD0IPE (ORCPT ); Fri, 27 Apr 2018 04:15:04 -0400 X-UUID: 02e43fe195514bf88caeb50468fe727a-20180427 Received: from mtkcas06.mediatek.inc [(172.21.101.30)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 347077533; Fri, 27 Apr 2018 16:14:57 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs08n1.mediatek.inc (172.21.101.55) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Fri, 27 Apr 2018 16:14:48 +0800 Received: from mtkswgap22.mediatek.inc (172.21.77.33) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1210.3 via Frontend Transport; Fri, 27 Apr 2018 16:14:49 +0800 From: To: , , , , , CC: , , , , , Sean Wang Subject: [PATCH v2 3/6] dt-bindings: clock: mediatek: add entry for Mali-450 node to refer Date: Fri, 27 Apr 2018 16:14:44 +0800 Message-ID: <082c3040e2be27d30e0642943f6df35ff4de5666.1524816502.git.sean.wang@mediatek.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Sean Wang Just add binding for a required clock referenced by Mali-450 on MT7623 or MT2701 SoC. Cc: devicetree@vger.kernel.org Signed-off-by: Sean Wang --- include/dt-bindings/clock/mt2701-clk.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/dt-bindings/clock/mt2701-clk.h b/include/dt-bindings/clock/mt2701-clk.h index 24e93df..2ac62a6 100644 --- a/include/dt-bindings/clock/mt2701-clk.h +++ b/include/dt-bindings/clock/mt2701-clk.h @@ -431,6 +431,10 @@ #define CLK_ETHSYS_CRYPTO 8 #define CLK_ETHSYS_NR 9 +/* G3DSYS */ +#define CLK_G3DSYS_CORE 1 +#define CLK_G3DSYS_NR 2 + /* BDP */ #define CLK_BDP_BRG_BA 1 -- 2.7.4