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[209.132.180.67]) by mx.google.com with ESMTP id bf10-v6si7438520plb.417.2018.04.30.02.42.40; Mon, 30 Apr 2018 02:42:54 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752935AbeD3JmW (ORCPT + 99 others); Mon, 30 Apr 2018 05:42:22 -0400 Received: from mail.skyhub.de ([5.9.137.197]:33078 "EHLO mail.skyhub.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752534AbeD3JmU (ORCPT ); Mon, 30 Apr 2018 05:42:20 -0400 X-Virus-Scanned: Nedap ESD1 at mail.skyhub.de Received: from mail.skyhub.de ([127.0.0.1]) by localhost (blast.alien8.de [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id 8pGfN7zO3iRj; Mon, 30 Apr 2018 11:42:03 +0200 (CEST) Received: from pd.tnic (p200300EC2BC6BB0018CA5EB1E28A3112.dip0.t-ipconnect.de [IPv6:2003:ec:2bc6:bb00:18ca:5eb1:e28a:3112]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.skyhub.de (SuperMail on ZX Spectrum 128k) with ESMTPSA id 405291EC00E5; Mon, 30 Apr 2018 11:42:03 +0200 (CEST) Date: Mon, 30 Apr 2018 11:41:44 +0200 From: Borislav Petkov To: David Wang Cc: tony.luck@intel.com, tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com, gregkh@linuxfoundation.org, x86@kernel.org, linux-kernel@vger.kernel.org, linux-edac@vger.kernel.org, brucechang@via-alliance.com, cooperyan@zhaoxin.com, qiyuanwang@zhaoxin.com, benjaminpan@viatech.com, lukelin@viacpu.com, timguo@zhaoxin.com Subject: Re: [PATCH v3 1/2] x86/mce: new Centaur CPU support MCE broadcasting Message-ID: <20180430094144.GE6509@pd.tnic> References: <1524652420-17330-1-git-send-email-davidwang@zhaoxin.com> <1524652420-17330-2-git-send-email-davidwang@zhaoxin.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <1524652420-17330-2-git-send-email-davidwang@zhaoxin.com> User-Agent: Mutt/1.9.3 (2018-01-21) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Apr 25, 2018 at 06:33:39PM +0800, David Wang wrote: > Newer Centaur multi-core CPU also support MCE broadcasting to all cores. But > no Centaur special code tell this truth to kernel. > > Signed-off-by: David Wang > --- > arch/x86/kernel/cpu/mcheck/mce.c | 19 +++++++++++++++++++ > 1 file changed, 19 insertions(+) I applied this with some minor improvements: --- From: David Wang Date: Wed, 25 Apr 2018 18:33:39 +0800 Subject: [PATCH] x86/MCA: Enable MCE broadcasting on new Centaur CPUs Newer Centaur multi-core CPUs also support MCE broadcasting to all cores. Add a Centaur-specific init function setting that up. [ bp: - make mce_centaur_feature_init() static - flip check to do the f/m/s first for better readability - touch up text ] Signed-off-by: David Wang Cc: Greg KH Cc: Tony Luck Cc: benjaminpan@viatech.com Cc: brucechang@via-alliance.com Cc: cooperyan@zhaoxin.com Cc: lukelin@viacpu.com Cc: qiyuanwang@zhaoxin.com Cc: timguo@zhaoxin.com Cc: x86-ml Cc: linux-edac Link: http://lkml.kernel.org/r/1524652420-17330-2-git-send-email-davidwang@zhaoxin.com Signed-off-by: Borislav Petkov --- arch/x86/kernel/cpu/mcheck/mce.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c index 42cf2880d0ed..cd76380af79f 100644 --- a/arch/x86/kernel/cpu/mcheck/mce.c +++ b/arch/x86/kernel/cpu/mcheck/mce.c @@ -1727,6 +1727,21 @@ static void __mcheck_cpu_init_early(struct cpuinfo_x86 *c) } } +static void mce_centaur_feature_init(struct cpuinfo_x86 *c) +{ + struct mca_config *cfg = &mca_cfg; + + /* + * All newer Centaur CPUs support MCE broadcasting. Enable + * synchronization with a one second timeout. + */ + if ((c->x86 == 6 && c->x86_model == 0xf && c->x86_stepping >= 0xe) || + c->x86 > 6) { + if (cfg->monarch_timeout < 0) + cfg->monarch_timeout = USEC_PER_SEC; + } +} + static void __mcheck_cpu_init_vendor(struct cpuinfo_x86 *c) { switch (c->x86_vendor) { @@ -1739,6 +1754,9 @@ static void __mcheck_cpu_init_vendor(struct cpuinfo_x86 *c) mce_amd_feature_init(c); break; } + case X86_VENDOR_CENTAUR: + mce_centaur_feature_init(c); + break; default: break; -- 2.13.0 -- Regards/Gruss, Boris. Good mailing practices for 400: avoid top-posting and trim the reply.