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[209.132.180.67]) by mx.google.com with ESMTP id 203si7524918pfz.160.2018.04.30.07.37.11; Mon, 30 Apr 2018 07:37:26 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=IIuNHrzK; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754059AbeD3OhC (ORCPT + 99 others); Mon, 30 Apr 2018 10:37:02 -0400 Received: from mail-wr0-f195.google.com ([209.85.128.195]:38100 "EHLO mail-wr0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753683AbeD3OhA (ORCPT ); Mon, 30 Apr 2018 10:37:00 -0400 Received: by mail-wr0-f195.google.com with SMTP id 94-v6so6947418wrf.5 for ; Mon, 30 Apr 2018 07:36:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:content-transfer-encoding:in-reply-to :user-agent; bh=UgGdk+/Ogv3eb4XuwCA528lFIDQI3QwzVwOcQfpBX20=; b=IIuNHrzKEIqZVW/I2YQUeYJCI3mlnEo1iHmS8I2mn3H0cc9lmGq20owB2MVXvWZGzP 2F0Kx/gCE4EiNCZQfEsm9MpZguJeyj2wcZSzBUI/3QcD9XAF0J+KN21Y4MH0yaAy+mH1 NOWRWx+yyLufsKdIMNUyAZPmWuHzVqwBFcFKY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:content-transfer-encoding :in-reply-to:user-agent; bh=UgGdk+/Ogv3eb4XuwCA528lFIDQI3QwzVwOcQfpBX20=; b=f8TPSx/URdcmKBALNmE2pGkeWavuAmiMNQvywGubaEcB03IIKBvsefSId6TuS/4LiF j6YOn2QiqH4DrMS8c3JVhwnB+lN/42B14aMc5aR2OcHWRGLo6f4BnOuz5XTBIzvIz4P8 2YV7a8crtwFTblKkpG/r9TFaGlgVkN2dNxZeZoTgYx7PzHUtgFx2AAfa2IWrntDNX8Po PUx1j0I6XUVWVeQQnnUyOaEzFrBq1pmbb1606ONUbbN6gpr1znlk68U6G0CzNCZcXU4s ps1iul/DTVUzmChBzzcpCJfHwQVMDI+eOl5vdLefhLwbR/8uzk3CYIgaRpTQnCwkWZjO mkcA== X-Gm-Message-State: ALQs6tA8F4o9dA4T9ZW80q9sYKvztvjVF0ujptCglG3C4yrfqZfZURbK Tz2/tBgYagSaopGjkX6MynDGtg== X-Received: by 2002:adf:a0ea:: with SMTP id n39-v6mr9068774wrn.87.1525099018812; Mon, 30 Apr 2018 07:36:58 -0700 (PDT) Received: from mai ([2a01:e35:879a:6cd0:3e97:eff:fe5b:1402]) by smtp.gmail.com with ESMTPSA id n4sm14772476wmg.29.2018.04.30.07.36.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 30 Apr 2018 07:36:58 -0700 (PDT) Date: Mon, 30 Apr 2018 16:36:56 +0200 From: Daniel Lezcano To: Bartlomiej Zolnierkiewicz Cc: Eduardo Valentin , Zhang Rui , linux-samsung-soc@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 01/18] thermal: exynos: fix setting rising_threshold for Exynos5433 Message-ID: <20180430143656.GH11457@mai> References: <1524743493-28113-1-git-send-email-b.zolnierkie@samsung.com> <1524743493-28113-2-git-send-email-b.zolnierkie@samsung.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <1524743493-28113-2-git-send-email-b.zolnierkie@samsung.com> User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Apr 26, 2018 at 01:51:16PM +0200, Bartlomiej Zolnierkiewicz wrote: > Add missing clearing of the previous value when setting rising > temperature threshold. > > Signed-off-by: Bartlomiej Zolnierkiewicz > --- > drivers/thermal/samsung/exynos_tmu.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c > index cda716c..523d26e 100644 > --- a/drivers/thermal/samsung/exynos_tmu.c > +++ b/drivers/thermal/samsung/exynos_tmu.c > @@ -577,6 +577,7 @@ static int exynos5433_tmu_initialize(struct platform_device *pdev) > threshold_code = temp_to_code(data, temp); > > rising_threshold = readl(data->base + rising_reg_offset); > + rising_threshold &= ~(0xff << j * 8); > rising_threshold |= (threshold_code << j * 8); Bartlomiej, I see this code is duplicated all around the driver, so I can't blame you to fix it in the same way it is written today but this is not how to deal with fields in a register mapping. Can you fix it by adding correct macros with masks? -- Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog