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[209.132.180.67]) by mx.google.com with ESMTP id w25-v6si7023658pgv.526.2018.05.01.02.00.39; Tue, 01 May 2018 02:00:54 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=fg+1znG1; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752382AbeEAJA0 (ORCPT + 99 others); Tue, 1 May 2018 05:00:26 -0400 Received: from mail-wr0-f194.google.com ([209.85.128.194]:40635 "EHLO mail-wr0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751214AbeEAJAW (ORCPT ); Tue, 1 May 2018 05:00:22 -0400 Received: by mail-wr0-f194.google.com with SMTP id v60-v6so10266471wrc.7 for ; Tue, 01 May 2018 02:00:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:content-transfer-encoding:in-reply-to :user-agent; bh=E+glKrWaqcF6djL7iJ/ib85qH/SIRB3qxS5gOkkTTqQ=; b=fg+1znG1WKxm//UBVNFHDYPPwVK4XSzH+WEjZel9HzqO2l9LE093QJ5qU0uIIaTEaj 8oSO8lV6jsDgajiMvige7/JGtF4Q6K265ZdAmWkmhlTbd6L/s/FTBSVib8Q5gF7Y7CuO OIOmyYPqqoL2LA0q1Juyd2LappqDoQt/3ijc8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:content-transfer-encoding :in-reply-to:user-agent; bh=E+glKrWaqcF6djL7iJ/ib85qH/SIRB3qxS5gOkkTTqQ=; b=ZDsg9b+3WNbnR+Y6cingP5oruy4NZI7p1qC4zPO/Mj3SSQldwZCusKU5J0/uBvIMfH KM8Lolb+9Yf9WwJAVyY9qkIIkTW0u5kkoRXhnb5kGMJa1HWA8wxrg4envgzfAoMoq9nO BwiIYKPo8YWp0caPSgTt7Gv+ok2031UDxrOyQt3LnuF4gW+jH8PhUjKuOk3ca3YAAnq1 VUnbyUaf4mMw9bL4SkxlGpxzCs62P6wPPmt3Qa3S754CKy8BL/0ZscoqlZUZlvAWsU3g /hY0ShqBVglN9eoLkpZdm8voMBrxhD+7+FcfSRaTEH+ru0ayGwZL+PwgFgIrLjtCu+Hz MA+g== X-Gm-Message-State: ALQs6tBKbw6M3KTYyQcjT1EotsMJLBfggGBUGwvbEojO0PSMm+WeclDM MkEEUezDzQx+NfUrpP17O/y6iQ== X-Received: by 2002:adf:8703:: with SMTP id a3-v6mr9022613wra.178.1525165221196; Tue, 01 May 2018 02:00:21 -0700 (PDT) Received: from mai ([37.171.255.167]) by smtp.gmail.com with ESMTPSA id j8-v6sm15697342wra.58.2018.05.01.02.00.19 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 01 May 2018 02:00:20 -0700 (PDT) Date: Tue, 1 May 2018 11:00:18 +0200 From: Daniel Lezcano To: Bartlomiej Zolnierkiewicz Cc: Eduardo Valentin , Zhang Rui , linux-samsung-soc@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 03/18] thermal: exynos: always check for critical trip points existence Message-ID: <20180501090018.GF27619@mai> References: <1524743493-28113-1-git-send-email-b.zolnierkie@samsung.com> <1524743493-28113-4-git-send-email-b.zolnierkie@samsung.com> <20180430144450.GI11457@mai> <5229331.iYYXeBBCxK@amdc3058> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <5229331.iYYXeBBCxK@amdc3058> User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Apr 30, 2018 at 05:24:15PM +0200, Bartlomiej Zolnierkiewicz wrote: > On Monday, April 30, 2018 04:44:50 PM Daniel Lezcano wrote: > > On Thu, Apr 26, 2018 at 01:51:18PM +0200, Bartlomiej Zolnierkiewicz wrote: > > > * Check for critical trip point existence in exynos_tmu_initialize() > > > so it is checked on all SoCs (except Exynos5433 for now). > > > > Why "except Exynos5433" ? > > I was a bit vague here - Exynos5433 DTS needs to be fixed first to define > critical trip points. Is it possible to fix the DT in the series, so we get rid of the "FIXME" ? -- Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog