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[216.188.254.6]) by smtp.gmail.com with ESMTPSA id v45-v6sm5646621otf.75.2018.05.01.06.39.06 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 01 May 2018 06:39:07 -0700 (PDT) Date: Tue, 1 May 2018 08:39:06 -0500 From: Rob Herring To: Tony Lindgren Cc: linux-omap@vger.kernel.org, Dave Gerlach , Greg Kroah-Hartman , Nishanth Menon , Suman Anna , Tero Kristo , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Mark Rutland , devicetree@vger.kernel.org Subject: Re: [PATCH 09/16] bus: ti-sysc: Add handling for clkctrl opt clocks Message-ID: <20180501133906.GA18650@rob-hp-laptop> References: <20180423174549.57412-1-tony@atomide.com> <20180423174549.57412-10-tony@atomide.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20180423174549.57412-10-tony@atomide.com> User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Apr 23, 2018 at 10:45:42AM -0700, Tony Lindgren wrote: > There can be up to eight optional device functional gate gate clocks for > each clkctrl instance in clkctrl register bits 8 to 15. Some of them are > only needed for module level reset while others may always be needed > during use. Let's add support for those and update the binding doc > accordingly. > > Note that the optional clkctrl mux and divider clocks starting at bit 20 > can be directly mapped to the child devices, and ti-sysc does not need to > manage those. > > And as GPIOs need the optional clocks for reset, we can now add it with > SYSC_QUIRK_OPT_CLKS_IN_RESET. > > Cc: Mark Rutland > Cc: Rob Herring > Cc: Tero Kristo > Cc: devicetree@vger.kernel.org > Signed-off-by: Tony Lindgren > --- > .../devicetree/bindings/bus/ti-sysc.txt | 6 +- Reviewed-by: Rob Herring > drivers/bus/ti-sysc.c | 140 ++++++++++++++---- > 2 files changed, 120 insertions(+), 26 deletions(-)