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[216.188.254.6]) by smtp.gmail.com with ESMTPSA id p72-v6sm6164230oie.33.2018.05.01.07.56.11 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 01 May 2018 07:56:11 -0700 (PDT) Date: Tue, 1 May 2018 09:56:11 -0500 From: Rob Herring To: Ludovic Barre Cc: Thomas Gleixner , Jason Cooper , Marc Zyngier , Maxime Coquelin , Alexandre Torgue , Gerald BAEZA , Loic PALLARDY , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org Subject: Re: [PATCH 07/11] irqchip: stm32: add stm32mp1 support with hierarchy domain Message-ID: <20180501145611.GA6842@rob-hp-laptop> References: <1524759514-12392-1-git-send-email-ludovic.Barre@st.com> <1524759514-12392-8-git-send-email-ludovic.Barre@st.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1524759514-12392-8-git-send-email-ludovic.Barre@st.com> User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Apr 26, 2018 at 06:18:30PM +0200, Ludovic Barre wrote: > From: Ludovic Barre > > Exti controller has been differently integrated on stm32mp1 SoC. > A parent irq has only one external interrupt. A hierachy domain could > be used. Handlers are call by parent, each parent interrupt could be > masked and unmasked according to the needs. > > Signed-off-by: Ludovic Barre > --- > .../interrupt-controller/st,stm32-exti.txt | 3 + > drivers/irqchip/irq-stm32-exti.c | 322 +++++++++++++++++++++ > 2 files changed, 325 insertions(+) > > diff --git a/Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.txt b/Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.txt > index edf03f0..136bd61 100644 > --- a/Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.txt > +++ b/Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.txt > @@ -5,11 +5,14 @@ Required properties: > - compatible: Should be: > "st,stm32-exti" > "st,stm32h7-exti" > + "st,stm32mp1-exti" > - reg: Specifies base physical address and size of the registers > - interrupt-controller: Indentifies the node as an interrupt controller > - #interrupt-cells: Specifies the number of cells to encode an interrupt > specifier, shall be 2 > - interrupts: interrupts references to primary interrupt controller > + (only needed for exti controller with multiple exti under > + same parent interrupt: st,stm32-exti and st,stm32h7-exti") > > Example: > > diff --git a/drivers/irqchip/irq-stm32-exti.c b/drivers/irqchip/irq-stm32-exti.c > index b38c655..ebf7146 100644 > --- a/drivers/irqchip/irq-stm32-exti.c > +++ b/drivers/irqchip/irq-stm32-exti.c [...] > +static const struct stm32_desc_irq stm32mp1_desc_irq[] = { > + { .exti = 1, .irq_parent = 7 }, > + { .exti = 2, .irq_parent = 8 }, > + { .exti = 3, .irq_parent = 9 }, > + { .exti = 4, .irq_parent = 10 }, > + { .exti = 5, .irq_parent = 23 }, > + { .exti = 6, .irq_parent = 64 }, > + { .exti = 7, .irq_parent = 65 }, > + { .exti = 8, .irq_parent = 66 }, > + { .exti = 9, .irq_parent = 67 }, > + { .exti = 10, .irq_parent = 40 }, > + { .exti = 11, .irq_parent = 42 }, > + { .exti = 12, .irq_parent = 76 }, > + { .exti = 13, .irq_parent = 77 }, > + { .exti = 14, .irq_parent = 121 }, > + { .exti = 15, .irq_parent = 127 }, > + { .exti = 16, .irq_parent = 1 }, > + { .exti = 65, .irq_parent = 144 }, > + { .exti = 68, .irq_parent = 143 }, > + { .exti = 73, .irq_parent = 129 }, > +}; You can use an interrupt-map property rather than put this into the driver.