Received: by 10.192.165.148 with SMTP id m20csp5235697imm; Tue, 1 May 2018 11:19:30 -0700 (PDT) X-Google-Smtp-Source: AB8JxZr58dg3s5my4oVoNwbPSe+et6nojICWrJotDfj4vedCV5sdk0SwIz2QLJDkFb1vdb7Izyye X-Received: by 2002:a65:4ece:: with SMTP id w14-v6mr13531682pgq.83.1525198770698; Tue, 01 May 2018 11:19:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1525198770; cv=none; d=google.com; s=arc-20160816; b=N6MJInQG/uqLUZw0DNB9p7PhNyKaD/6bygZNftsMp1tDvFcctuFt/dv8Ts3jdZjVGk 6hXGts7KI8Ve6plUW9EBEAiLvNe8lTyOIYmM3mpigtqzE4YOAUCQpU5MfQQA4cxho7IY wqy/UadcmCFYA2rIUepvG6XioHvTqjPZDEUEjxGHOMhfvd+jRwUan7+eMaprQaRZ0dtQ QA9MYa79ZemQ8PALWYggHH0vRhO7JBB/7e/sTYxWQDDMwXAIUCIiywVu7rCn3SDh3/ax tgPIDEqbxE+AmxmmtJCaIFPkDaUc5BnhRjOVW2qQB/C7Y/PTx6fu0GfGnkbEJ7i2ykp4 LhSg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:dkim-signature :arc-authentication-results; bh=mCg0aIvoPA45PuJOPaJYqGwIBMF21RIYPm/wTZ/DHoM=; b=okuZIAmt2iOC42QCZ45Fwmb2PwST2mxUjhTIb2TF4w9eQF/QG89EdmvSl4k1dHgU4u i3T1Ay8TzFO2QQTCsUtmRzZprsDGUIYXSlx2EzMfm9Ln9Rpf313Iw9OqgFVEu+oQywze 1nhev5onb7Or07mTlIc1RJMOmbrOO0BuJMLlD8GhzOjWvQgLyJwy06U2J410NpxOnfHF OOPQkmKPR6G0+TLxynkO2Xih4ShSeA1JtsJhmH+ZzSRRCRfM/jek6Pe0n3x1EMeD95I8 fH4g9pwGwq5bad3DGVG1b01yP6hwUraXIERROqlD50ihK2ZqFP1/vRD9aM691X2OPRoM bmsA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20161025 header.b=kOqbyQOk; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a33-v6si9555280plc.507.2018.05.01.11.19.16; Tue, 01 May 2018 11:19:30 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20161025 header.b=kOqbyQOk; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756463AbeEASS5 (ORCPT + 99 others); Tue, 1 May 2018 14:18:57 -0400 Received: from mail-it0-f45.google.com ([209.85.214.45]:50653 "EHLO mail-it0-f45.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756445AbeEASS4 (ORCPT ); Tue, 1 May 2018 14:18:56 -0400 Received: by mail-it0-f45.google.com with SMTP id p3-v6so14567301itc.0 for ; Tue, 01 May 2018 11:18:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=mCg0aIvoPA45PuJOPaJYqGwIBMF21RIYPm/wTZ/DHoM=; b=kOqbyQOkPBwTxikQArIoElIfLIDHi4VHm9fhWnie0WGUH67tRxzXEm9WBE8FmOftLK hwVzplUReE5KzHWEna0Bsh3U8cLq110yvN1iLAnakW5z4qjM2ar8JhAwQhJTfjpHBhe0 rATA4zVFNC+0HNckfh9ttcUaige0K8u0cOPjWqE2EAZTX/VlaNudkJ/GYZGX6BAVx8ex p7aYsDet0epWqSK+uY7VkZ+l77u1pLCCUThLVXgCrQYZltKqaEMhuOyKEnh7m1VfF1Kt PwoRbbJ/+tbED38WdVRusY7mXjNhv7wzKtkeWfJqst7YFVM/1yEQjoL0TyyCddDKFHFK mtyw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=mCg0aIvoPA45PuJOPaJYqGwIBMF21RIYPm/wTZ/DHoM=; b=oG/oO4n2B5jhg92z2WmFIpqKsb8/UH9psLeWcXw7Hn5mtnG6LRCTYpAXDy27GJAJyE oY1bwaoOWBpVxq1xjKDtQHd/x3vdBETQlyUIctPFImX+rWUx8OoWdOY9bcRR6PkdQTx2 AtkbWSN6Ax3+SEYWN+NaC9nLw99R5cyeWRqWDgBNJyo0qrMezPBJ9Sk6JN3U6xUryCXA 0Kx/rugToNtEe62AWygoJUd4VSXlYeJ2REKYuuNYu5z8UOAKE80LyN33TD8kdD6x0cjy O8oGoN3tylzCReEgfTaboKTj20zNXhKuIESKwK/NVcuwhdXpmscYCq9SmvWc8Y759H3u BD6A== X-Gm-Message-State: ALQs6tBOXU4OuOcwIeRM0Gz8EIYM0oqsLJWeNZRsWIBCaL2YbKmRFmc7 7Xtf65QrBF6xHdKizjOPWNm9sNqJfTiRlPPN6e8SZpZ9 X-Received: by 2002:a24:438f:: with SMTP id s137-v6mr14872600itb.28.1525198735354; Tue, 01 May 2018 11:18:55 -0700 (PDT) MIME-Version: 1.0 References: <1516190084-18978-1-git-send-email-julien.thierry@arm.com> <07a0b8c1-3d87-0cae-61df-dbff782be301@arm.com> <20180430105559.ys6kcfoy76o3qpoj@holly.lan> In-Reply-To: <20180430105559.ys6kcfoy76o3qpoj@holly.lan> From: Joel Fernandes Date: Tue, 01 May 2018 18:18:44 +0000 Message-ID: Subject: Re: [PATCH v2 0/6] arm64: provide pseudo NMI with GICv3 To: Daniel Thompson Cc: julien.thierry@arm.com, "Joel Fernandes (Google)" , "moderated list:ARM64 PORT (AARCH64 ARCHITECTURE)" , LKML , Mark Rutland , Marc Zyngier , James Morse Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > > On 29/04/18 07:37, Joel Fernandes wrote: > > > On Wed, Jan 17, 2018 at 4:10 AM, Julien Thierry < julien.thierry@arm.com> wrote: > > > > Hi, > > > > > > > > On 17/01/18 11:54, Julien Thierry wrote: > > > > > > > > > > This series is a continuation of the work started by Daniel [1]. The goal > > > > > is to use GICv3 interrupt priorities to simulate an NMI. > > > > > > > > > > > > > > > > > I have submitted a separate series making use of this feature for the ARM > > > > PMUv3 interrupt [1]. > > > > > > I guess the hard lockup detector using NMI could be a nice next step > > > to see how well it works with lock up detection. That's the main > > > usecase for my interest. However, perf profiling is also a strong one. > > > > > > > From my understanding, Linux's hardlockup detector already uses the ARM PMU > > interrupt to check whether some task is stuck. I haven't looked at the > > details of the implementation yet, but in theory having the PMU interrupt as > > NMI should make the hard lockup detector use the NMI. > > > > When I do the v3, I'll have a look at this to check whether the hardlockup > > detector works fine when using NMI. > That's what I saw on arch/arm (with some of the much older FIQ work). > Once you have PMU and the appropriate config to *admit* to supporting > hard lockup then it will "just work" and be setup automatically during > kernel boot. > Actually the problem then becomes that if you want to use the PMU > for anything else then you may end up having to disable the hard > lockup detector. This problem is not anything pseudo-NMI specific though right? Contention/constraints on PMU resources should be a problem even on platforms with real NMI. thanks, - Joel