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[209.132.180.67]) by mx.google.com with ESMTP id e8-v6si8251612pgt.185.2018.05.01.15.48.35; Tue, 01 May 2018 15:48:59 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=n/CvrOzv; dkim=pass header.i=@codeaurora.org header.s=default header.b=G/4y920V; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751952AbeEAWsI (ORCPT + 99 others); Tue, 1 May 2018 18:48:08 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:36026 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751148AbeEAWsG (ORCPT ); Tue, 1 May 2018 18:48:06 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id BAE7A6090E; Tue, 1 May 2018 22:48:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1525214885; bh=YpTNME6x1YtlArHUzj/6KENQxI2QgnXKxwNMENSLew8=; h=Subject:To:Cc:References:From:Date:In-Reply-To:From; b=n/CvrOzvK05SoUPL6y0JtBC3GIiE25Eu9Yj8XUtTf5qzhdlqNLWq302aHVjhspYeq xXq5sEKlP7hpYAwyYuuezLTwJgvi1r3BHlpywDj6BVqfyR61IclobFvD2kaQCJ56iV BnOLEvUJKV0P+bRZ5GYnDXUUsbam1V+qacjeokjM= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED,T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from [10.235.228.150] (global_nat1_iad_fw.qualcomm.com [129.46.232.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: okaya@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 5121F6028D; Tue, 1 May 2018 22:48:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1525214884; bh=YpTNME6x1YtlArHUzj/6KENQxI2QgnXKxwNMENSLew8=; h=Subject:To:Cc:References:From:Date:In-Reply-To:From; b=G/4y920VvxHnQ8oj4+m8kPqO4/vr4DT7N3o9PXDmo7BUrGRa8QRZwY8PNLirAe3Go ruYVCXyWlR5Ai3DupjZI66yDsCfgC+qK3cf6P6rVW9DiRXAAyq6CFoDqcQa59oIx5e DUJefqwizswpAdDAmzvObPyuMlrLnAExjRI7hP4Y= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 5121F6028D Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=okaya@codeaurora.org Subject: Re: [PATCH] alpha: io: reorder barriers to guarantee writeX() and iowriteX() ordering #2 To: linux-alpha@vger.kernel.org, arnd@arndb.de, timur@codeaurora.org, sulrich@codeaurora.org, Matt Turner Cc: linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Richard Henderson , Ivan Kokshaysky , Philippe Ombredanne , Greg Kroah-Hartman , Thomas Gleixner , Kate Stewart , linux-kernel@vger.kernel.org References: <1523917017-28084-1-git-send-email-okaya@codeaurora.org> <2fd54f7c-ff73-5935-a253-c924f4373cc6@codeaurora.org> From: Sinan Kaya Message-ID: Date: Tue, 1 May 2018 18:48:02 -0400 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.7.0 MIME-Version: 1.0 In-Reply-To: <2fd54f7c-ff73-5935-a253-c924f4373cc6@codeaurora.org> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 4/20/2018 12:20 PM, Sinan Kaya wrote: > Hi Matt, > > On 4/17/2018 2:43 PM, Sinan Kaya wrote: >> On 4/16/2018 6:16 PM, Sinan Kaya wrote: >>> memory-barriers.txt has been updated with the following requirement. >>> >>> "When using writel(), a prior wmb() is not needed to guarantee that the >>> cache coherent memory writes have completed before writing to the MMIO >>> region." >>> >>> Current writeX() and iowriteX() implementations on alpha are not >>> satisfying this requirement as the barrier is after the register write. >>> >>> Move mb() in writeX() and iowriteX() functions to guarantee that HW >>> observes memory changes before performing register operations. >>> >>> Signed-off-by: Sinan Kaya >>> Reported-by: Arnd Bergmann >>> --- >>> arch/alpha/kernel/io.c | 14 +++++++------- >>> 1 file changed, 7 insertions(+), 7 deletions(-) >> >> Sorry for catching this late but this also needs to go to 4.17 after >> review. >> >> I missed the writel() implementation on arch/alpha/kernel/io.c file >> on my first patch. >> > > Can you also queue this for 4.17? > > There are already drivers checked into 4.17 that dropped the unnecessary > barriers. > > I really hate to see Alpha broken because of this. ping. > > Sinan > -- Sinan Kaya Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc. Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.