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[209.132.180.67]) by mx.google.com with ESMTP id a23si10401951pfh.295.2018.05.01.18.46.26; Tue, 01 May 2018 18:46:40 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@lechnology.com header.s=default header.b=CV35oiwW; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751116AbeEBBqP (ORCPT + 99 others); Tue, 1 May 2018 21:46:15 -0400 Received: from vern.gendns.com ([206.190.152.46]:52579 "EHLO vern.gendns.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751310AbeEBBqM (ORCPT ); Tue, 1 May 2018 21:46:12 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lechnology.com; s=default; h=Content-Transfer-Encoding:Content-Type: In-Reply-To:MIME-Version:Date:Message-ID:From:References:Cc:To:Subject:Sender :Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=HIoCdkhEbwzTqp+w0SpSQxO+b3Pc+AjSBvt0hnd49Hs=; b=CV35oiwWfyt88pyBjmAR58R9G1 C48eYMNzgV95LL9iRZPxKEmZygaX5wbmNmlpcVI61EhWMAIhLLbja5x91eSc14MJY2O9BbeUS3ff7 oA1YcKyNM9wgP+IpLr3NqKFpJZBHU2QY0MZCrrbBHGGdjxhmuYLTBQk+pjfbl42qfNu9vhOIgVPHZ lNCVBEruiaPKLvSPbA5tT7nb+7JBIGAbqkrNiACqDwwq/arM+s4W+n9P0GAm+Qd+szv/KmNuOUlQ6 z06LiFnskDIXjkJyHj/1VJyhiSpuaXi2HPgBg6RJ8lgAsj7UT9nR8CTIOy4X5644aq15MXLzOno2Y 8OP5b9Xg==; Received: from 108-198-5-147.lightspeed.okcbok.sbcglobal.net ([108.198.5.147]:46320 helo=[192.168.0.134]) by vern.gendns.com with esmtpsa (TLSv1.2:ECDHE-RSA-AES128-GCM-SHA256:128) (Exim 4.89_1) (envelope-from ) id 1fDgqQ-002AlG-SS; Tue, 01 May 2018 21:46:11 -0400 Subject: Re: [PATCH v9 02/27] clk: davinci: da850-pll: change PLL0 to CLK_OF_DECLARE To: Sekhar Nori , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland , Kevin Hilman , Bartosz Golaszewski , Adam Ford , linux-kernel@vger.kernel.org References: <20180427001745.4116-1-david@lechnology.com> <20180427001745.4116-3-david@lechnology.com> From: David Lechner Message-ID: Date: Tue, 1 May 2018 20:46:09 -0500 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.7.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - vern.gendns.com X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - lechnology.com X-Get-Message-Sender-Via: vern.gendns.com: authenticated_id: davidmain+lechnology.com/only user confirmed/virtual account not confirmed X-Authenticated-Sender: vern.gendns.com: davidmain@lechnology.com X-Source: X-Source-Args: X-Source-Dir: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 05/01/2018 08:46 AM, Sekhar Nori wrote: > On Friday 27 April 2018 05:47 AM, David Lechner wrote: >> PLL0 on davinci/da850-type device needs to be registered early in boot >> because it is needed for clocksource/clockevent. Change the driver >> to use CLK_OF_DECLARE for this special case. >> >> Signed-off-by: David Lechner >> --- >> >> v9 changes: >> - new patch in v9 >> >> >> drivers/clk/davinci/pll-da850.c | 26 ++++++++++++++++++++++---- >> drivers/clk/davinci/pll.c | 4 +++- >> drivers/clk/davinci/pll.h | 2 +- >> 3 files changed, 26 insertions(+), 6 deletions(-) >> >> diff --git a/drivers/clk/davinci/pll-da850.c b/drivers/clk/davinci/pll-da850.c >> index 00a6ece7b524..743527de1da2 100644 >> --- a/drivers/clk/davinci/pll-da850.c >> +++ b/drivers/clk/davinci/pll-da850.c >> @@ -12,6 +12,8 @@ >> #include >> #include >> #include >> +#include >> +#include >> #include >> #include >> >> @@ -135,11 +137,27 @@ static const struct davinci_pll_sysclk_info *da850_pll0_sysclk_info[] = { >> NULL >> }; >> >> -int of_da850_pll0_init(struct device *dev, void __iomem *base, struct regmap *cfgchip) >> +void of_da850_pll0_init(struct device_node *node) >> { >> - return of_davinci_pll_init(dev, dev->of_node, &da850_pll0_info, >> - &da850_pll0_obsclk_info, >> - da850_pll0_sysclk_info, 7, base, cfgchip); >> + void __iomem *base; >> + struct regmap *cfgchip; >> + >> + base = of_iomap(node, 0); >> + if (!base) { >> + pr_err("%s: ioremap failed\n", __func__); >> + return; >> + } >> + >> + cfgchip = syscon_regmap_lookup_by_compatible("ti,da830-cfgchip"); >> + if (IS_ERR(cfgchip)) { >> + pr_warn("%s: failed to get cfgchip (%ld)\n", __func__, >> + PTR_ERR(cfgchip)); >> + cfgchip = NULL; >> + } > > Is this error handling for cfgchip needed here considering > davinci_pll_clk_register() already checks and warns. Ah, good point. I'll clean this up.