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[209.132.180.67]) by mx.google.com with ESMTP id r10-v6si6253524pgs.647.2018.05.01.18.52.33; Tue, 01 May 2018 18:52:48 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@lechnology.com header.s=default header.b=gQhlJPG3; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751178AbeEBBwY (ORCPT + 99 others); Tue, 1 May 2018 21:52:24 -0400 Received: from vern.gendns.com ([206.190.152.46]:52783 "EHLO vern.gendns.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750823AbeEBBwV (ORCPT ); Tue, 1 May 2018 21:52:21 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lechnology.com; s=default; h=Content-Transfer-Encoding:Content-Type: In-Reply-To:MIME-Version:Date:Message-ID:From:References:Cc:To:Subject:Sender :Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=cMz53j/2Tqc3iXQCtNR6+k5nTs6hE1ON587QPFFde2c=; b=gQhlJPG3eHTVBANNqKP9Nzp3tj 99dd2N+Gj/mpf9xGLD4MwjeaC5bLIxQidTQO0tJmRLFuRC3ky+NtwjGvy/s0yZ+8Ra4EBxYWSulJw d3nC/YJOOxflTXvZO8of0ItizuTvmsSCsaoNMtsQaFL/QlFOMZRUkuX197P6Wo5r5hhsN+x2urDzn eunBUQWVBQvWHEDdq6B6oXxvmnplZ9BdNBPi0cOuIB+Ghpn8QGyLb2aQHzSNSVLgztwk+JeEz/h+h mQgOPuz8bXebZJSduOdl+QLKG0STDgm4QiCzQI5SLG+aw60V8HkAO3cyeosGyrFoCXE4JTxPJ7p8d yPzk7iZQ==; Received: from 108-198-5-147.lightspeed.okcbok.sbcglobal.net ([108.198.5.147]:46424 helo=[192.168.0.134]) by vern.gendns.com with esmtpsa (TLSv1.2:ECDHE-RSA-AES128-GCM-SHA256:128) (Exim 4.89_1) (envelope-from ) id 1fDgwN-002BTg-Pn; Tue, 01 May 2018 21:52:19 -0400 Subject: Re: [PATCH v9 24/27] dt-bindings: timer: new bindings for TI DaVinci timer To: Rob Herring Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Michael Turquette , Stephen Boyd , Mark Rutland , Sekhar Nori , Kevin Hilman , Bartosz Golaszewski , Adam Ford , linux-kernel@vger.kernel.org References: <20180427001745.4116-1-david@lechnology.com> <20180427001745.4116-25-david@lechnology.com> <20180427140522.npmhjamhwxgp7y73@rob-hp-laptop> From: David Lechner Message-ID: <7cea07f1-e174-8496-a27a-01f0e3082054@lechnology.com> Date: Tue, 1 May 2018 20:52:18 -0500 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.7.0 MIME-Version: 1.0 In-Reply-To: <20180427140522.npmhjamhwxgp7y73@rob-hp-laptop> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - vern.gendns.com X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - lechnology.com X-Get-Message-Sender-Via: vern.gendns.com: authenticated_id: davidmain+lechnology.com/only user confirmed/virtual account not confirmed X-Authenticated-Sender: vern.gendns.com: davidmain@lechnology.com X-Source: X-Source-Args: X-Source-Dir: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Sekhar, On 04/27/2018 09:05 AM, Rob Herring wrote: > On Thu, Apr 26, 2018 at 07:17:42PM -0500, David Lechner wrote: >> This adds new device tree bindings for the timer IP block of TI >> DaVinci-like SoCs. >> >> Signed-off-by: David Lechner >> --- >> >> v9 changes: >> - new patch in v9 >> >> >> .../bindings/timer/ti,davinci-timer.txt | 24 +++++++++++++++++++ >> 1 file changed, 24 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/timer/ti,davinci-timer.txt >> >> diff --git a/Documentation/devicetree/bindings/timer/ti,davinci-timer.txt b/Documentation/devicetree/bindings/timer/ti,davinci-timer.txt >> new file mode 100644 >> index 000000000000..2091eca46981 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/timer/ti,davinci-timer.txt >> @@ -0,0 +1,24 @@ >> +* Device tree bindings for Texas Instruments DaVinci timer >> + >> +This document provides bindings for the 64-bit timer in the DaVinci >> +architecture devices. The timer can be configured as a general-purpose 64-bit >> +timer, dual general-purpose 32-bit timers. When configured as dual 32-bit >> +timers, each half can operate in conjunction (chain mode) or independently >> +(unchained mode) of each other. >> + >> +It is global timer is a free running up-counter and can generate interrupt > > Doesn't make sense, too many 'is'. > > There's no interrupt property listed. > >> +when the counter reaches preset counter values. >> + >> +Required properties: >> + >> +- compatible : should be "ti,davinci-timer". >> +- reg : specifies base physical address and count of the registers. >> +- clocks : the clock feeding the timer clock. >> + >> +Example: >> + >> + clocksource: timer@20000 { >> + compatible = "ti,davinci-timer"; >> + reg = <0x20000 0x1000>; >> + clocks = <&pll0_auxclk>; >> + }; >> -- >> 2.17.0 >> What do you think about trying to reuse the keystone timer here instead of introducing our own binding? I assume it is basically the same since the watchdog timer is shared already between davinci and keystone.