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[86.9.19.6]) by smtp.gmail.com with ESMTPSA id p128sm19403101wmd.45.2018.05.02.04.02.15 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 02 May 2018 04:02:15 -0700 (PDT) Date: Wed, 2 May 2018 12:02:13 +0100 From: Daniel Thompson To: Joel Fernandes Cc: julien.thierry@arm.com, "Joel Fernandes (Google)" , "moderated list:ARM64 PORT (AARCH64 ARCHITECTURE)" , LKML , Mark Rutland , Marc Zyngier , James Morse Subject: Re: [PATCH v2 0/6] arm64: provide pseudo NMI with GICv3 Message-ID: <20180502110213.okx5gxu7vys34nxt@holly.lan> References: <1516190084-18978-1-git-send-email-julien.thierry@arm.com> <07a0b8c1-3d87-0cae-61df-dbff782be301@arm.com> <20180430105559.ys6kcfoy76o3qpoj@holly.lan> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: NeoMutt/20180323 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, May 01, 2018 at 06:18:44PM +0000, Joel Fernandes wrote: > > > From my understanding, Linux's hardlockup detector already uses the ARM > PMU > > > interrupt to check whether some task is stuck. I haven't looked at the > > > details of the implementation yet, but in theory having the PMU > interrupt as > > > NMI should make the hard lockup detector use the NMI. > > > > > > When I do the v3, I'll have a look at this to check whether the > hardlockup > > > detector works fine when using NMI. > > > That's what I saw on arch/arm (with some of the much older FIQ work). > > > Once you have PMU and the appropriate config to *admit* to supporting > > hard lockup then it will "just work" and be setup automatically during > > kernel boot. > > > Actually the problem then becomes that if you want to use the PMU > > for anything else then you may end up having to disable the hard > > lockup detector. > > This problem is not anything pseudo-NMI specific though right? > Contention/constraints on PMU resources should be a problem even on > platforms with real NMI. Quite so. Nothing specific to pseudo-NMI; merely part of life's rich tapestry. Moreover it is a potential surprise for anyone coming from x86 since I think the performance monitors make it easier to run hard lockup alongside some simple perf activity. Either way, if you are impacted, its easy to disable the hard lockup using procfs. Daniel.