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[209.132.180.67]) by mx.google.com with ESMTP id s3-v6si9576438plp.241.2018.05.02.14.08.22; Wed, 02 May 2018 14:08:36 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=POUc9qZV; dkim=pass header.i=@codeaurora.org header.s=default header.b=haapEJ0q; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751753AbeEBVGh (ORCPT + 99 others); Wed, 2 May 2018 17:06:37 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:59324 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750945AbeEBVGc (ORCPT ); Wed, 2 May 2018 17:06:32 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 7FA9960310; Wed, 2 May 2018 21:06:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1525295191; bh=IHpqTVo6cl+WfHzutG+nzItsUtM1OJdCTXSxnvmivFw=; h=From:To:Cc:Subject:Date:From; b=POUc9qZVjkxuajNKsLjeE9yhC03iDnIXg07iwerYlhTwcrLDQZXKDmmLPCoFV4h3y il5SaP/Aw0yRuaI1dzkuSh7olf4EJqwKM+C4Vcw55PRVvjbalwePJUoL3M57iNbS4B 4FzpFy6v8X55FGkDRo4GzxewxLY4sGCi/lELYLVU= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED,T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from mgautam-linux.qualcomm.com (blr-c-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: mgautam@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 5182660710; Wed, 2 May 2018 21:06:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1525295190; bh=IHpqTVo6cl+WfHzutG+nzItsUtM1OJdCTXSxnvmivFw=; h=From:To:Cc:Subject:Date:From; b=haapEJ0qXfECmShz0USp9mjWe9kZ57EJwoB75TbBj2UHT8YWUPfoHiFHv6v9p4s1b Qb8RhjER6R1bZrSfzSY3qX7O934evh8iB+0zD1Ju1fSNC3VMQzbjQU/5us1SK2aOnS StqBF1JUAeETMpd78G2zpceO41BbqSe5Y7TO+5HI= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 5182660710 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=mgautam@codeaurora.org From: Manu Gautam To: Kishon Vijay Abraham I , robh@kernel.org, sboyd@kernel.org Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dianders@chromium.org, evgreen@chromium.org, Vivek Gautam , linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, Manu Gautam Subject: [PATCH v5 0/7] phy: qcom: Updates for USB PHYs on SDM845 Date: Thu, 3 May 2018 02:36:07 +0530 Message-Id: <1525295174-15995-1-git-send-email-mgautam@codeaurora.org> X-Mailer: git-send-email 1.9.1 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org SDM845 has two USB instances each with QUSB2 and QMP PHYs. One of the QMP PHY is USB-DP (DisplayPort) combo PHY where as other one is single lane UNI-PHY (without DP support). Changes are related to PHY configuration for electrical parameters tuning to improve eye-diagram and some fixes. First gcc-msm8996 driver patch is dependent on following patch which is now applied by Stephen. https://patchwork.kernel.org/patch/10375043/ Changes since v4: - Addressed Doug's review comments to have QUSB2 PHY tuning values in header file. - Updated msm8996-gcc patch to use BRANCH_HALT_SKIP flag added by patch - https://patchwork.kernel.org/patch/10375041/ Changes since v3: - As per Doug's review comments added device tree parameters to handle board level differences in PHY tuning values instead of adding separate device tree bindings. - Replace PHY version specific bindings names with SOC name as no one is going to use generic binding names. - Update halt_check to not check for pipe clock status that allows to simplify pipe_clk handling in QMP driver. Changes since v2: - Use separate phy_ops for USB to not register power_on op. - And other minor changes as per review comments from Stephen. Changes since v1: - Updated qusb2 compatibility name as per comment from Vivek. Manu Gautam (7): clk: msm8996-gcc: Mark halt check as no-op for USB/PCIE pipe_clk phy: qcom-qmp: Enable pipe_clk before PHY initialization phy: qcom-qusb2: Fix crash if nvmem cell not specified dt-bindings: phy-qcom-qmp: Update bindings for sdm845 phy: qcom-qmp: Add QMP V3 USB3 UNI PHY support for sdm845 dt-bindings: phy-qcom-usb2: Add support to override tuning values phy: qcom-qusb2: Add QUSB2 PHYs support for sdm845 .../devicetree/bindings/phy/qcom-qmp-phy.txt | 3 +- .../devicetree/bindings/phy/qcom-qusb2-phy.txt | 23 ++- drivers/clk/qcom/gcc-msm8996.c | 4 + drivers/phy/qualcomm/phy-qcom-qmp.c | 169 +++++++++++++++++++-- drivers/phy/qualcomm/phy-qcom-qmp.h | 5 + drivers/phy/qualcomm/phy-qcom-qusb2.c | 130 +++++++++++++++- include/dt-bindings/phy/phy-qcom-qusb2.h | 37 +++++ 7 files changed, 346 insertions(+), 25 deletions(-) create mode 100644 include/dt-bindings/phy/phy-qcom-qusb2.h -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project