Received: by 10.192.165.148 with SMTP id m20csp1332479imm; Wed, 2 May 2018 19:35:00 -0700 (PDT) X-Google-Smtp-Source: AB8JxZorekn83/D5goLun+5MdrANAojqeuXH3cIbYMBCHPtaL2Ck03+D3+CUPpkeTX1YIaqDUN8+ X-Received: by 10.98.33.151 with SMTP id o23mr21629265pfj.202.1525314900392; Wed, 02 May 2018 19:35:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1525314900; cv=none; d=google.com; s=arc-20160816; b=pUaGsWJvX22c1qbmYO77p57PpFzdCA2z4O5YiuW+vz7v//7FG9J0DIredrbAtqJ6gM JQlAQwC9JC2tGXd+iunkep2hEX3lJpUalsu55KuPsb4NUPtzDEFzi/BrGLFuWQyT0HHw LB6IkGbZcW2PvuHRAvuwFCdbnFKvamdAMO+3h4XFRjBi1OWBB3Q3Tjs57410i/z/XEdQ b9XK+h4WSQhBuM6A1B5Uruach9lblubS7bR2i79PDucI+fvy5lbx7y7u/eiGwRzLzx1E 3ww+2+45JFEfJJDxxNoLVlyeUHDGxKIRSJLff+R/1ysfSMW/ASW1YhbH5dZpvZxRF8Cx dgUQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:message-id:date:subject:cc :to:from:arc-authentication-results; bh=JJGz/WanSHlZVqqIj7QGuJmYyqN6qbYB3GF5CEzctvI=; b=iBIiSRS4xizTFJQ8RDG9NHt1Hbg8XPAtXU6l9f5gKq28wl7zDrdeH630Sl0g2+eNsj /+FhOS2r1c/qBT+uuKy2YMNRjvbc+Pi/WE0VHs6EI9byz0SA6NZRUeKuySqijGY7aqfi yc9FqkZ9YW4xM6SdB4i/geGnD6kJ09xvdOCER7rq6yZXYRInG9Iq/oCfOwxuZty5aIe9 fSgBIMQqtvil64IQLL76yg3aAlx1KoOEisicyCWvcl0MB76a9k0gxsE4POym3pNYDjFp YFvcM1KZISmFv9VW6zrJrbe1rkB5IsTDN8qVlQsXPhpPYpe1bXmeJafQS6MXZLWfXfs2 +0Dw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id i7-v6si627452pgq.507.2018.05.02.19.34.46; Wed, 02 May 2018 19:35:00 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752051AbeECCc4 (ORCPT + 99 others); Wed, 2 May 2018 22:32:56 -0400 Received: from ZXSHCAS1.zhaoxin.com ([203.148.12.81]:28669 "EHLO ZXSHCAS1.zhaoxin.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1751929AbeECCcx (ORCPT ); Wed, 2 May 2018 22:32:53 -0400 Received: from zxbjmbx3.zhaoxin.com (10.29.252.165) by ZXSHCAS1.zhaoxin.com (10.28.252.161) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1261.35; Thu, 3 May 2018 10:32:50 +0800 Received: from timguo-System-Product-Name.zhaoxin.com (10.29.8.54) by zxbjmbx3.zhaoxin.com (10.29.252.165) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1261.35; Thu, 3 May 2018 10:32:49 +0800 From: David Wang To: , , , , , CC: , , , , , , David Wang Subject: [PATCH 0/3] x86/CPU: Report correct cpu/cache topo for Centaur CPUs and some minor changes Date: Thu, 3 May 2018 10:32:43 +0800 Message-ID: <1525314766-18910-1-git-send-email-davidwang@zhaoxin.com> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.29.8.54] X-ClientProxiedBy: zxbjmbx1.zhaoxin.com (10.29.252.163) To zxbjmbx3.zhaoxin.com (10.29.252.165) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org There are three patches: The first patch define detect_num_cpu_cores() in common.c to replace the original intel_num_cpu_cores() which is defined in intel.c; The second patch is used to include the legacy cpu_detect_cache_sizes() into the init_intel_cacheinfo() function; The third patch is used to report correct CPU/Cache topology by using the functions defined in the first and the second patch; David Wang (3): x86/CPU: Replace intel_num_cpu_cores with detect_num_cpu_cores x86/cpu/intel_cacheinfo: include cpu_detect_cache_size in init_intel_cacheinfo x86/Centaur: Report correct CPU/cache topology arch/x86/include/asm/processor.h | 1 + arch/x86/kernel/cpu/centaur.c | 5 +++++ arch/x86/kernel/cpu/common.c | 14 ++++++++++++++ arch/x86/kernel/cpu/intel.c | 28 ++-------------------------- arch/x86/kernel/cpu/intel_cacheinfo.c | 6 ++++++ 5 files changed, 28 insertions(+), 26 deletions(-) -- 1.9.1