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[209.132.180.67]) by mx.google.com with ESMTP id t128-v6si1282657pgt.368.2018.05.03.05.16.56; Thu, 03 May 2018 05:17:11 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751360AbeECMQr (ORCPT + 99 others); Thu, 3 May 2018 08:16:47 -0400 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:5418 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751075AbeECMQn (ORCPT ); Thu, 3 May 2018 08:16:43 -0400 Received: from pps.filterd (m0046037.ppops.net [127.0.0.1]) by mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w43C3rTT025241; Thu, 3 May 2018 14:16:38 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2hqe4uw1fy-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Thu, 03 May 2018 14:16:38 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 02B213A; Thu, 3 May 2018 12:16:36 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag3node2.st.com [10.75.127.8]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 9404C2992; Thu, 3 May 2018 12:16:36 +0000 (GMT) Received: from [10.201.21.58] (10.75.127.44) by SFHDAG3NODE2.st.com (10.75.127.8) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Thu, 3 May 2018 14:16:35 +0200 Subject: Re: [PATCH v1 2/3] ARM: dts: stm32: add cec pins to stm32mp157c To: yannick fertre , Philippe Cornu , Rob Herring , Mark Rutland , , , Loic Pallardy , Gerald Baeza , Patrice Chotard , Kamel Kholti CC: Benjamin Gaignard References: <1524556449-5262-1-git-send-email-yannick.fertre@st.com> <1524556449-5262-3-git-send-email-yannick.fertre@st.com> From: Alexandre Torgue Message-ID: <298dd3aa-037c-5f8b-a276-9c9a8bcb67ac@st.com> Date: Thu, 3 May 2018 14:16:26 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.7.0 MIME-Version: 1.0 In-Reply-To: <1524556449-5262-3-git-send-email-yannick.fertre@st.com> Content-Type: text/plain; charset="utf-8"; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [10.75.127.44] X-ClientProxiedBy: SFHDAG8NODE2.st.com (10.75.127.23) To SFHDAG3NODE2.st.com (10.75.127.8) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2018-05-03_06:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Yannick On 04/24/2018 09:54 AM, yannick fertre wrote: > This patch adds cec support on stm32mp157c eval board. > > Signed-off-by: Yannick Fertre > --- > arch/arm/boot/dts/stm32mp157-pinctrl.dtsi | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi > index 6f044100..67b0349 100644 > --- a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi > +++ b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi > @@ -14,6 +14,15 @@ > ranges = <0 0x50002000 0xa400>; > pins-are-numbered; > > + cec_pins_a: cec@0 { > + pins { > + pinmux = ; > + bias-disable; > + drive-open-drain; > + slew-rate = <0>; > + }; > + }; > + > gpioa: gpio@50002000 { > gpio-controller; > #gpio-cells = <2>; > Next time, please put pins group after gpio controller and don't use cec@0 but cec-0 to declare pins group. I'll change it this time during merge. Thanks Alex