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[209.132.180.67]) by mx.google.com with ESMTP id w2-v6si15334689plz.226.2018.05.03.15.13.21; Thu, 03 May 2018 15:13:37 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=vXKaO1s+; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751181AbeECWMy (ORCPT + 99 others); Thu, 3 May 2018 18:12:54 -0400 Received: from mail-qk0-f193.google.com ([209.85.220.193]:43222 "EHLO mail-qk0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750911AbeECWMx (ORCPT ); Thu, 3 May 2018 18:12:53 -0400 Received: by mail-qk0-f193.google.com with SMTP id h19so15220011qkj.10 for ; Thu, 03 May 2018 15:12:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:sender:in-reply-to:references:from:date:message-id :subject:to:cc; bh=KWGdMj1i+ldhQXoupb7PRqhkLMIWX141u8YOJdjtqMI=; b=vXKaO1s+tqnExXpLLzD2dwvp7IEw2dmHoJJKADQPg3pYIGPnN/I4bEZqcQZnvTvOni 7ukZsAHqVzGE6t/lV4284pTOY8QYTw4KZ6Wir94yrizbF7c7LnGdhTsIGHAvflNCyAuv KFTpOacwnzgOkzRvn7ZskarOllA508xYrtW+okJodJONJDVRSkZOI4a2wZuYigkWxRgl QE9GKHVpbyFdfbkjxkTmlJF3xZ88r+fIXX8QNkNO7gYEZIvZNtevJRlmWk4cMhzG+21B 3UM/+jvQChgC7pceCBzXvtgA8E6cI1yYLpvsD+5LPnnPild2l4l/jRKf9fastBhDZRWW M+Ig== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:sender:in-reply-to:references:from :date:message-id:subject:to:cc; bh=KWGdMj1i+ldhQXoupb7PRqhkLMIWX141u8YOJdjtqMI=; b=cXsVKCWh9+ICCkX0Oe/XLclKjBvGQm3CVGnP2LYyDuEJWt931hLLRczbeWUPIu8qtP ElALNAg+HI7m70bnGBHvDrbqBbkjqS9KjeSfbOMBRc6MLUxHapcYLt/o9Jly+MgT+2Pf b7WrNNCCHCRKh60THQgkdjXpz2Wg319b3dzejUXXdM86s9/Ky0cKyfeM8dl2gm5sDE6j yOx1cgP93eLtojveT/lO0SIcubrGIGvCPfXrF9ITb7HNio5xi9bqKNJgqbIw4u16Kg7U TmlwjhD6ptICRgrwWomvPiWTQBbXHcuqzehNpeoTRtn5+UuP/DQSET30LsQ+/z/BmRxg ceDg== X-Gm-Message-State: ALKqPwe37PkIDMnIhi4lNQB3wdmyDMXhCfJfw1OjOxdybmGFwjAsQOco Z/YTRHY+5EUdgNXZsPfkP3sLamO1pqbR6IjClB4= X-Received: by 10.55.180.1 with SMTP id d1mr5154883qkf.283.1525385572615; Thu, 03 May 2018 15:12:52 -0700 (PDT) MIME-Version: 1.0 Received: by 10.12.185.3 with HTTP; Thu, 3 May 2018 15:12:52 -0700 (PDT) In-Reply-To: References: <1525274696-11968-1-git-send-email-fabrice.gasnier@st.com> From: Arnd Bergmann Date: Thu, 3 May 2018 18:12:52 -0400 X-Google-Sender-Auth: HLKuvIVu09uPjk83pX8jIaxkVTo Message-ID: Subject: Re: [PATCH] ARM: multi_v7_defconfig: enable STM32 analog & timer drivers To: Alexandre Torgue Cc: Fabrice Gasnier , Russell King - ARM Linux , Maxime Coquelin , Linux ARM , Linux Kernel Mailing List Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, May 3, 2018 at 10:05 AM, Alexandre Torgue wrote: > Hi Fabrice, > > On 05/02/2018 05:24 PM, Fabrice Gasnier wrote: >> >> This enables drivers for STM32 timer, low power timer and analog hardware >> that can be used on STM32MP1 SoC: >> - Timer & LP Timer MFD core, PWM, trigger & encoder drivers >> - IIO ADC/DAC/DFSDM >> - vrefbuf regu driver (voltage reference buffer). >> >> Signed-off-by: Fabrice Gasnier >> --- >> arch/arm/configs/multi_v7_defconfig | 10 ++++++++++ >> 1 file changed, 10 insertions(+) >> > > Applied on stm32-next. > > Arnd, > Do you agree if I take multi_v7_defconfig related patches in my stm32 pull > requests ? Yes, just make sure that all drivers that can reasonably be loadable modules are configured that way rather than as built-in, so a defconfig build doesn't become too big. Arnd