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[209.132.180.67]) by mx.google.com with ESMTP id k195-v6si12585314pgc.493.2018.05.03.22.48.19; Thu, 03 May 2018 22:48:35 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751262AbeEDFrq (ORCPT + 99 others); Fri, 4 May 2018 01:47:46 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:39154 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1750709AbeEDFro (ORCPT ); Fri, 4 May 2018 01:47:44 -0400 X-UUID: 080fd3cf35f546638e6d040bf7815422-20180504 Received: from mtkcas08.mediatek.inc [(172.21.101.126)] by mailgw01.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 793022756; Fri, 04 May 2018 13:47:38 +0800 Received: from mtkcas09.mediatek.inc (172.21.101.178) by mtkmbs08n2.mediatek.inc (172.21.101.56) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Fri, 4 May 2018 13:47:36 +0800 Received: from localhost.localdomain (10.17.3.153) by mtkcas09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1210.3 via Frontend Transport; Fri, 4 May 2018 13:47:35 +0800 From: To: , , , , , , , , , , , CC: , , , , , , Subject: [PATCH v7 0/2] PCI: mediatek: Fixups for the IRQ handle routine and MT7622's class code Date: Fri, 4 May 2018 13:47:31 +0800 Message-ID: <1525412853-24367-1-git-send-email-honghui.zhang@mediatek.com> X-Mailer: git-send-email 2.6.4 MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Honghui Zhang Two fixups for mediatek's host bridge: The first patch fixup class type and vendor ID for MT7622. The second patch fixup the IRQ handle routine by using irq_chip solution to avoid IRQ reentry which may exist for both MT2712 and MT7622. Change since v6: - Remove the irq_mask, irq_unmask callback in lower layer irq_chip since we have set the MSI_FLAG_USE_DEF_CHIP_OPS flags. - Add irq_ack callback in irq_chip to handle edge IRQ. - Uing handle_edge_irq to handle the MSI IRQs. Change since v5: - Make the comments consistend with the code modification in the first patch. - Using writew to performing a 16-bit write. - Using irq_chip solution to fix the IRQ issue. The v5 patchset could be found in: https://patchwork.kernel.org/patch/10133303 https://patchwork.kernel.org/patch/10133305 Change since v4: - Only setup vendor ID for MT7622, igorning the device ID since mediatek's host bridge driver does not cares about the device ID. Change since v3: - Setup the class type and vendor ID at the beginning of startup instead of in a quirk. - Add mediatek's vendor ID, it could be found in: https://pcisig.com/membership/member-companies?combine=&page=4 Change since v2: - Move the initialize of the iterate before the loop to fix an INTx IRQ issue in the first patch Change since v1: - Add the second patch. - Make the first patch's commit message more standard. Honghui Zhang (2): PCI: mediatek: Set up vendor ID and class type for MT7622 PCI: mediatek: Using chained IRQ to setup IRQ handle drivers/pci/host/pcie-mediatek.c | 234 +++++++++++++++++++++++---------------- include/linux/pci_ids.h | 2 + 2 files changed, 143 insertions(+), 93 deletions(-) -- 2.6.4