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[209.132.180.67]) by mx.google.com with ESMTP id o63-v6si12631862pga.584.2018.05.03.23.45.24; Thu, 03 May 2018 23:45:40 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=lEN54M/Y; dkim=pass header.i=@codeaurora.org header.s=default header.b=VUf7VD62; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751349AbeEDGpL (ORCPT + 99 others); Fri, 4 May 2018 02:45:11 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:51256 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751107AbeEDGpI (ORCPT ); Fri, 4 May 2018 02:45:08 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id CFE37607E5; Fri, 4 May 2018 06:45:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1525416307; bh=sDpAG1dIHpecvljBU3n0BTJF2GFYJo9uTx7zMZoznLw=; h=From:To:Cc:References:In-Reply-To:Subject:Date:From; b=lEN54M/YPSprDHgwFs3g/vQ3cRcZwmDmFzBvWhh+FmrV+8Q+YPTUjJnRMZMXcGXDL w2jbOy0PId7xt1BtacjPBjV1pwAABpokwkuGoEGZIsOBqVkQNHR507kNVxfbOftrm4 pC7lQ+Et4tklxDyu+NK/xR3NuMDEWLep7uecPOoo= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED,T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from ilial (unknown [37.19.120.234]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: ilialin@codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id CE8D06019F; Fri, 4 May 2018 06:44:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1525416299; bh=sDpAG1dIHpecvljBU3n0BTJF2GFYJo9uTx7zMZoznLw=; h=From:To:Cc:References:In-Reply-To:Subject:Date:From; b=VUf7VD62RFWCbmTXwuLM8JAaVE6Ogw7ZSBPWEXAs6b2Y9Zkth+j8c1txuoHmddeeU Sf+vYjdBlVyJ/F0HAm0np2rJ8TCuSnUg7nEd9jwnZcLiAnET4BFvbXRIsrgPj8dHqA ejiLAKSEjTwm3XQxE2n8rHc+l+YOtXHdJIlZIIRk= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org CE8D06019F Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=ilialin@codeaurora.org From: To: "'Viresh Kumar'" Cc: , , , , , , , , , , , , , , , , , , , , , , References: <1525348355-25471-1-git-send-email-ilialin@codeaurora.org> <1525348355-25471-13-git-send-email-ilialin@codeaurora.org> <20180504060827.7bddb53ln2ogwcvv@vireshk-i7> In-Reply-To: <20180504060827.7bddb53ln2ogwcvv@vireshk-i7> Subject: RE: [PATCH v5 12/14] cpufreq: Add Kryo CPU scaling driver Date: Fri, 4 May 2018 09:44:48 +0300 Message-ID: <002a01d3e373$6b6ee410$424cac30$@codeaurora.org> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit X-Mailer: Microsoft Outlook 16.0 Thread-Index: AQIw4YufeDUO1xSdYb5xrMmiursktAKqm3zYAYB5uIOjQ8nJ0A== Content-Language: en-us Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > -----Original Message----- > From: Viresh Kumar > Sent: Friday, May 4, 2018 09:08 > To: Ilia Lin > Cc: mturquette@baylibre.com; sboyd@kernel.org; robh@kernel.org; > mark.rutland@arm.com; rjw@rjwysocki.net; lgirdwood@gmail.com; > broonie@kernel.org; andy.gross@linaro.org; david.brown@linaro.org; > catalin.marinas@arm.com; will.deacon@arm.com; linux-clk@vger.kernel.org; > devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; linux- > pm@vger.kernel.org; linux-arm-msm@vger.kernel.org; linux- > soc@vger.kernel.org; linux-arm-kernel@lists.infradead.org; > rnayak@codeaurora.org; amit.kucheria@linaro.org; > nicolas.dechesne@linaro.org; celster@codeaurora.org; > tfinkel@codeaurora.org > Subject: Re: [PATCH v5 12/14] cpufreq: Add Kryo CPU scaling driver > > On 03-05-18, 14:52, Ilia Lin wrote: > > In Certain QCOM SoCs like apq8096 and msm8996 that have KRYO > > processors, the CPU ferequencies subset and voltage value of each OPP > > varies based on the silicon variant in use. Qualcomm Process Voltage > > Scaling Tables defines the voltage and frequency value based on the > > msm-id in SMEM and speedbin blown in the efuse combination. > > The qcom-cpufreq-kryo driver reads the msm-id and efuse value from the > > SoC to provide the OPP framework with required information. > > This is used to determine the voltage and frequency value for each OPP > > of > > operating-points-v2 table when it is parsed by the OPP framework. > > > > Signed-off-by: Ilia Lin > > --- > > drivers/cpufreq/Kconfig.arm | 11 +++ > > drivers/cpufreq/Makefile | 1 + > > drivers/cpufreq/cpufreq-dt-platdev.c | 3 + > > drivers/cpufreq/qcom-cpufreq-kryo.c | 153 > > +++++++++++++++++++++++++++++++++++ > > 4 files changed, 168 insertions(+) > > create mode 100644 drivers/cpufreq/qcom-cpufreq-kryo.c > > > > diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm > > index de55c7d..f9da18c 100644 > > --- a/drivers/cpufreq/Kconfig.arm > > +++ b/drivers/cpufreq/Kconfig.arm > > @@ -124,6 +124,17 @@ config ARM_OMAP2PLUS_CPUFREQ > > depends on ARCH_OMAP2PLUS > > default ARCH_OMAP2PLUS > > > > +config ARM_QCOM_CPUFREQ_KRYO > > + tristate "Qualcomm Technologies, Inc. Kryo based CPUFreq" > > I don't see any reply to Sricharan's query on this being tristate. Why shouldn't we leave possibility to compile the cpufreq-dt built-in, and the qcom-cpufreq-kryo module? > > > + depends on QCOM_QFPROM > > + depends on QCOM_SMEM > > + select PM_OPP > > + help > > + This adds the CPUFreq driver for > > + Qualcomm Technologies, Inc. Kryo SoC based boards. > > + > > + If in doubt, say N. > > + > > config ARM_S3C_CPUFREQ > > bool > > help > > diff --git a/drivers/cpufreq/Makefile b/drivers/cpufreq/Makefile index > > 8d24ade..fb4a2ec 100644 > > --- a/drivers/cpufreq/Makefile > > +++ b/drivers/cpufreq/Makefile > > @@ -65,6 +65,7 @@ obj-$(CONFIG_MACH_MVEBU_V7) += > mvebu-cpufreq.o > > obj-$(CONFIG_ARM_OMAP2PLUS_CPUFREQ) += omap-cpufreq.o > > obj-$(CONFIG_ARM_PXA2xx_CPUFREQ) += pxa2xx-cpufreq.o > > obj-$(CONFIG_PXA3xx) += pxa3xx-cpufreq.o > > +obj-$(CONFIG_ARM_QCOM_CPUFREQ_KRYO) += qcom-cpufreq- > kryo.o > > obj-$(CONFIG_ARM_S3C2410_CPUFREQ) += s3c2410-cpufreq.o > > obj-$(CONFIG_ARM_S3C2412_CPUFREQ) += s3c2412-cpufreq.o > > obj-$(CONFIG_ARM_S3C2416_CPUFREQ) += s3c2416-cpufreq.o > > diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c > > b/drivers/cpufreq/cpufreq-dt-platdev.c > > index 3b585e4..77d6ab8 100644 > > --- a/drivers/cpufreq/cpufreq-dt-platdev.c > > +++ b/drivers/cpufreq/cpufreq-dt-platdev.c > > @@ -118,6 +118,9 @@ > > > > { .compatible = "nvidia,tegra124", }, > > > > + { .compatible = "qcom,apq8096", }, > > + { .compatible = "qcom,msm8996", }, > > + > > { .compatible = "st,stih407", }, > > { .compatible = "st,stih410", }, > > > > diff --git a/drivers/cpufreq/qcom-cpufreq-kryo.c > > b/drivers/cpufreq/qcom-cpufreq-kryo.c > > new file mode 100644 > > index 0000000..32371cc > > --- /dev/null > > +++ b/drivers/cpufreq/qcom-cpufreq-kryo.c > > @@ -0,0 +1,153 @@ > > +// SPDX-License-Identifier: GPL-2.0 > > +/* Copyright (c) 2018, The Linux Foundation. All rights reserved. > > Incorrect multi line comment. This was done as per Bjorn's instruction. > > > + * > > + * This program is free software; you can redistribute it and/or > > + modify > > + * it under the terms of the GNU General Public License version 2 and > > + * only version 2 as published by the Free Software Foundation. > > + * > > + * This program is distributed in the hope that it will be useful, > > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > > + * GNU General Public License for more details. > > + */ > > + > > +#include > > +#include > > +#include > > +//#include > > ?? Not good. Will fix this.bbbbbbbb > > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > + > > +#define MSM_ID_SMEM 137 > > +#define SILVER_LEAD 0 > > +#define GOLD_LEAD 2 > > + > > +enum _msm_id { > > + MSM8996V3 = 0xF6ul, > > + APQ8096V3 = 0x123ul, > > + MSM8996SG = 0x131ul, > > + APQ8096SG = 0x138ul, > > +}; > > + > > +enum _msm8996_version { > > + MSM8996_V3, > > + MSM8996_SG, > > + NUM_OF_MSM8996_VERSIONS, > > +}; > > + > > +static enum _msm8996_version __init > > +qcom_cpufreq_kryo_get_msm_id(void) > > +{ > > + size_t len; > > + u32 *msm_id; > > + enum _msm8996_version version; > > + > > + msm_id = qcom_smem_get(QCOM_SMEM_HOST_ANY, > MSM_ID_SMEM, &len); > > + /* The first 4 bytes are format, next to them is the actual msm-id */ > > + msm_id++; > > + > > + switch ((enum _msm_id)*msm_id) { > > + case MSM8996V3: > > + case APQ8096V3: > > + version = MSM8996_V3; > > + break; > > + case MSM8996SG: > > + case APQ8096SG: > > + version = MSM8996_SG; > > + break; > > + default: > > + version = NUM_OF_MSM8996_VERSIONS; > > + } > > + > > + return version; > > +} > > + > > +static int __init qcom_cpufreq_kryo_driver_init(void) > > +{ > > + size_t len; > > + int ret; > > + u32 versions; > > + enum _msm8996_version msm8996_version; > > + u8 *speedbin; > > + struct platform_device *pdev; > > + struct device *cpu_dev; > > + struct device_node *np; > > + struct nvmem_cell *speedbin_nvmem; > > + struct opp_table *opp_temp = NULL; > > + > > + cpu_dev = get_cpu_device(SILVER_LEAD); > > + if (IS_ERR_OR_NULL(cpu_dev)) > > + return PTR_ERR(cpu_dev); > > + > > + msm8996_version = qcom_cpufreq_kryo_get_msm_id(); > > + if (NUM_OF_MSM8996_VERSIONS == msm8996_version) { > > + dev_err(cpu_dev, "Not Snapdragon 820/821!"); > > + return -ENODEV; > > + } > > + > > + np = dev_pm_opp_of_get_opp_desc_node(cpu_dev); > > + if (IS_ERR_OR_NULL(np)) > > + return PTR_ERR(np); > > + > > + if (!of_device_is_compatible(np, "operating-points-v2-kryo-cpu")) { > > + ret = -ENOENT; > > + goto free_np; > > + } > > + > > + speedbin_nvmem = of_nvmem_cell_get(np, NULL); > > + if (IS_ERR(speedbin_nvmem)) { > > + ret = PTR_ERR(speedbin_nvmem); > > + dev_err(cpu_dev, "Could not get nvmem cell: %d\n", ret); > > + goto free_np; > > + } > > + > > + speedbin = nvmem_cell_read(speedbin_nvmem, &len); > > + > > + switch (msm8996_version) { > > + case MSM8996_V3: > > + versions = 1 << (unsigned int)(*speedbin); > > + break; > > + case MSM8996_SG: > > + versions = 1 << ((unsigned int)(*speedbin) + 4); > > + break; > > + default: > > + BUG(); > > + break; > > + } > > + > > + ret = PTR_ERR_OR_ZERO(opp_temp = \ > > + > dev_pm_opp_set_supported_hw(cpu_dev,&versions,1)); > > + if (0 > ret) > > + goto free_np; > > + > > + cpu_dev = get_cpu_device(GOLD_LEAD); > > + ret = > PTR_ERR_OR_ZERO(dev_pm_opp_set_supported_hw(cpu_dev,&versions,1 > )); > > + if (0 > ret) > > + goto put_supported_hw_silver; > > + > > + of_node_put(np); > > + > > + pdev = platform_device_register_simple("cpufreq-dt", -1, NULL, 0); > > + if (IS_ERR(pdev)) { > > + return PTR_ERR(pdev); > > Don't need to free resources on error here ? You are right. Will fix. > > > + } > > + > > + return 0; > > + > > +put_supported_hw_silver: > > + dev_pm_opp_put_supported_hw(opp_temp); > > + > > +free_np: > > + of_node_put(np); > > + > > + return ret; > > +} > > +late_initcall(qcom_cpufreq_kryo_driver_init); > > + > > +MODULE_DESCRIPTION("Qualcomm Technologies, Inc. Kryo CPUfreq > > +driver"); MODULE_LICENSE("GPL v2"); > > -- > > 1.9.1 > > -- > viresh