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[209.132.180.67]) by mx.google.com with ESMTP id a10si18037919pfk.350.2018.05.04.15.57.05; Fri, 04 May 2018 15:57:22 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=xt5ktkMk; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751765AbeEDW44 (ORCPT + 99 others); Fri, 4 May 2018 18:56:56 -0400 Received: from mail.kernel.org ([198.145.29.99]:37444 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751621AbeEDW4z (ORCPT ); Fri, 4 May 2018 18:56:55 -0400 Received: from mail-qt0-f180.google.com (mail-qt0-f180.google.com [209.85.216.180]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 9AC212177F; Fri, 4 May 2018 22:56:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1525474614; bh=wydH4xrr+j6BISaiMM1wbGzxfWBO/Z4m2QqLxh66zmY=; h=In-Reply-To:References:From:Date:Subject:To:Cc:From; b=xt5ktkMkJmuQny0n4B25uhJP+5psBfU/bQplpC1DcfvlSy538ujhwiu1mnY4fymr5 XjDx8EFNBXb2ON/7jKNb+RX70deS3c9dq4AQY3+LP9MXN9tf/5CS+phbBXBB5Hx9ke dBDc6eKEtiQiyGqsWcrNHWrRd5d5OQqOpLozNc20= Received: by mail-qt0-f180.google.com with SMTP id h2-v6so29486819qtp.7; Fri, 04 May 2018 15:56:54 -0700 (PDT) X-Gm-Message-State: ALQs6tBCYsS3DicERnv91RDpo7b//LxlMj7Md251x327G831drgis9WN P+KNQFtVsIJGCXOqJNooV5s4wP8CiqXCQdHg0g== X-Received: by 2002:aed:26c3:: with SMTP id q61-v6mr27053726qtd.60.1525474613774; Fri, 04 May 2018 15:56:53 -0700 (PDT) MIME-Version: 1.0 Received: by 10.12.155.2 with HTTP; Fri, 4 May 2018 15:56:33 -0700 (PDT) In-Reply-To: References: <1525165857-11096-1-git-send-email-suzuki.poulose@arm.com> <1525165857-11096-11-git-send-email-suzuki.poulose@arm.com> <20180501131300.GA31425@rob-hp-laptop> From: Rob Herring Date: Fri, 4 May 2018 17:56:33 -0500 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 10/27] dts: bindings: Restrict coresight tmc-etr scatter-gather mode To: Mathieu Poirier Cc: Suzuki K Poulose , linux-arm-kernel , "linux-kernel@vger.kernel.org" , Mike Leach , Robert Walker , Mark Rutland , Will Deacon , Robin Murphy , Sudeep Holla , Frank Rowand , John Horley , Mathieu Poirier , devicetree@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, May 3, 2018 at 3:32 PM, Mathieu Poirier wrote: > On 1 May 2018 at 07:13, Rob Herring wrote: >> On Tue, May 01, 2018 at 10:10:40AM +0100, Suzuki K Poulose wrote: >>> We are about to add the support for ETR builtin scatter-gather mode >>> for dealing with large amount of trace buffers. However, on some of >>> the platforms, using the ETR SG mode can lock up the system due to >>> the way the ETR is connected to the memory subsystem. >>> >>> In SG mode, the ETR performs READ from the scatter-gather table to >>> fetch the next page and regular WRITE of trace data. If the READ >>> operation doesn't complete(due to the memory subsystem issues, >>> which we have seen on a couple of platforms) the trace WRITE >>> cannot proceed leading to issues. So, we by default do not >>> use the SG mode, unless it is known to be safe on the platform. >>> We define a DT property for the TMC node to specify whether we >>> have a proper SG mode. >>> >>> Cc: Mathieu Poirier >>> Cc: Mike Leach >>> Cc: Mark Rutland >>> Cc: John Horley >>> Cc: Robert Walker >>> Cc: devicetree@vger.kernel.org >>> Cc: frowand.list@gmail.com >>> Cc: Rob Herring >>> Signed-off-by: Suzuki K Poulose >>> --- >>> Documentation/devicetree/bindings/arm/coresight.txt | 3 +++ >>> drivers/hwtracing/coresight/coresight-tmc.c | 8 +++++++- >>> 2 files changed, 10 insertions(+), 1 deletion(-) >>> >>> diff --git a/Documentation/devicetree/bindings/arm/coresight.txt b/Documentation/devicetree/bindings/arm/coresight.txt >>> index cdd84d0..7c0c8f0 100644 >>> --- a/Documentation/devicetree/bindings/arm/coresight.txt >>> +++ b/Documentation/devicetree/bindings/arm/coresight.txt >>> @@ -88,6 +88,9 @@ its hardware characteristcs. >>> * arm,buffer-size: size of contiguous buffer space for TMC ETR >>> (embedded trace router) >>> >>> + * scatter-gather: boolean. Indicates that the TMC-ETR can safely >>> + use the SG mode on this system. >>> + >> >> Needs a vendor prefix. >> > > Thinking further on this, do we need to make it device specific as > well - something like "arm,etr-scatter-gather"? That way we don't > have to redefine "scatter-gather" for other ARM devices if they happen > to need the same property but for different reasons. No. If we had a bunch of cases, then we'd probably want to have just 'scatter-gather'. BTW, if SG had already been supported, then I'd say this is a quirk and we should invert this property. Otherwise, you'd be disabling once enabled SG and require working platforms to update their dtb. Of course, I shouldn't really let the state of an OS driver influence the DT binding. Rob