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[209.132.180.67]) by mx.google.com with ESMTP id r144si11613692pfr.286.2018.05.05.03.49.16; Sat, 05 May 2018 03:50:02 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=bjWYaJk1; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751267AbeEEKtD (ORCPT + 99 others); Sat, 5 May 2018 06:49:03 -0400 Received: from mail-qt0-f169.google.com ([209.85.216.169]:46329 "EHLO mail-qt0-f169.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750830AbeEEKtA (ORCPT ); Sat, 5 May 2018 06:49:00 -0400 Received: by mail-qt0-f169.google.com with SMTP id m16-v6so30563932qtg.13; Sat, 05 May 2018 03:49:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=rSAX5y9uiiOfbCiLhezOvyJuNnc7SrDEkL2v8wY6ISw=; b=bjWYaJk1GqW4OgFCP6l2h/xJ9thGjX1q9nJ4iEdHfSpCov25QNmXEwVWO+ByFZFOF+ CtfPXKyGFiI8NpCwtExnKgqX8U9e2wwkUy52wCLiCn6xUR1qgs4XVHjF0pivXum6xUqN aj7qqwZB9F8R4UPMifigNuOXdFFcETsGumu8VmH66Oon+upGVPxRdri5fzdthL3VuW9A e8c2gqcFCZIv6vli+6vGVLIlorjJ0nmkwuiMogH0X6C03LFFsiJs3yBvSJSb00T9ab41 tzFVqEeqJXhi2Dn/nWMcBLxUOHXrK204v/vu32x+HMlSnPkAXW+qjFxX4NlpyTa9BWOX VgAw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=rSAX5y9uiiOfbCiLhezOvyJuNnc7SrDEkL2v8wY6ISw=; b=lqdeUjXHdNUY9jD98Ncv6ss0reOkVf3/IIZ+ufsDMRhEBDJboa0iDqyjCNAAlSxyJb yLDbAXIpIamY7KodieTz7sSbGkWbn5Q48Gyzc8rElD+KZIIyXldSDLNtGf9hW+RGZCGi aGwSuIccP29NnCSYbeC0+jVjhUMV/aAEjN20FTqQB6OknIfHCNywaX1vFztrxZnBhIjT Uy409d+yfV3Mdc5mQAC7hcl7ABa4oydvelSuVVWDLzck9bKe7dloJmfsD977jGZ94YjL 5RfqYNpv8/zvW096jEsjxNh66aAodVer58Z9bqgswIuTQ+lNOQVote7dV7NwVBLaa9Ev arZA== X-Gm-Message-State: ALQs6tDIpJe9xCk2ih4Cq698J6KjBVHQk6d1eLy0CkoWgZNEE+oAYtxy bH4Vw7nRf+7zhzLsWJZWmyI4jYP7JzKOBMT5b1c= X-Received: by 2002:ac8:3488:: with SMTP id w8-v6mr28351937qtb.278.1525517339957; Sat, 05 May 2018 03:48:59 -0700 (PDT) MIME-Version: 1.0 Received: by 10.12.152.150 with HTTP; Sat, 5 May 2018 03:48:59 -0700 (PDT) In-Reply-To: <1524759587-7007-1-git-send-email-phil.edworthy@renesas.com> References: <1524759587-7007-1-git-send-email-phil.edworthy@renesas.com> From: Andy Shevchenko Date: Sat, 5 May 2018 13:48:59 +0300 Message-ID: Subject: Re: [PATCH v5] gpio: dwapb: Add support for 1 interrupt per port A GPIO To: Phil Edworthy Cc: Hoan Tran , Linus Walleij , Rob Herring , Mark Rutland , Lee Jones , Michel Pollet , "open list:GPIO SUBSYSTEM" , devicetree , Linux-Renesas , Linux Kernel Mailing List Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Apr 26, 2018 at 7:19 PM, Phil Edworthy wrote: Sotty fo a late response. Consider follow up fixes for below. > if (!pp->irq_shared) { > + int i; > + > + for (i = 0; i < pp->ngpio; i++) { > + if (pp->irq[i]) > + irq_set_chained_handler_and_data(pp->irq[i], > + dwapb_irq_handler, gpio); > + } > } else { > /* > * Request a shared IRQ since where MFD would have devices > * using the same irq pin > */ > + err = devm_request_irq(gpio->dev, pp->irq[0], > dwapb_irq_handler_mfd, > IRQF_SHARED, "gpio-dwapb-mfd", gpio); > + if (pp->has_irq) > dwapb_configure_irqs(gpio, port, pp); I would rather make irq array a type of signed int and move conditional into the function to test per IRQ based. > /* Add GPIO-signaled ACPI event support */ > + if (pp->has_irq) > acpi_gpiochip_request_interrupts(&port->gc); Perhaps something similar. > if (dev->of_node && pp->idx == 0 && > fwnode_property_read_bool(fwnode, > "interrupt-controller")) { > + struct device_node *np = to_of_node(fwnode); > + unsigned int j; > + > + /* > + * The IP has configuration options to allow a single > + * combined interrupt or one per gpio. If one per gpio, > + * some might not be used. > + */ > + for (j = 0; j < pp->ngpio; j++) { > + int irq = of_irq_get(np, j); > + if (irq < 0) > + continue; > + > + pp->irq[j] = irq; > + pp->has_irq = true; > + } for (...) pp->irq = of_irq_get(); > } > + if (has_acpi_companion(dev) && pp->idx == 0) { > + unsigned int j; > + > + for (j = 0; j < pp->ngpio; j++) { > + pp->irq[j] = platform_get_irq(to_platform_device(dev), j); > + if (pp->irq[j]) > + pp->has_irq = true; > + } Ditto. Moreover you have a bug here. See my proposal at the top of this message. And now even better to ask, why platform_get_irq() wouldn't work for DT case? > + > + if (!pp->has_irq) > dev_warn(dev, "no irq for port%d\n", pp->idx); This could be issued in the actual function which will try to allocate IRQs (perhaps on debug level) P.S. Just think about it, perhaps you find even better solutions. -- With Best Regards, Andy Shevchenko