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[209.132.180.67]) by mx.google.com with ESMTP id m37-v6si19833019pla.346.2018.05.06.03.32.34; Sun, 06 May 2018 03:32:49 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=YeDXrm8g; dkim=pass header.i=@codeaurora.org header.s=default header.b=P44nICoU; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751692AbeEFKbQ (ORCPT + 99 others); Sun, 6 May 2018 06:31:16 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:51040 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751266AbeEFKbN (ORCPT ); Sun, 6 May 2018 06:31:13 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 09A7F601A8; Sun, 6 May 2018 10:31:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1525602673; bh=HQjLOiwr98SWRuB6iJ3kU6nBPEixQtJ84/+eu4jPXEE=; h=From:To:Cc:Subject:Date:From; b=YeDXrm8gcotr3kqJq3gVdZpf2jRHmTseVtGWlSTW4gAsKLmaH1bqB6gaqIjYSix2i +Dbvxvonx2oP/khDNecioqGhBUV467FqZe9AmTRhBDFogK+iVc9BZXbjzlBXfYv+Hb Ad9UEUhv8GhQLsXh+G11jixVPxjHCChRN1bRPcjs= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED,T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from drakthul.qualcomm.com (global_nat1_iad_fw.qualcomm.com [129.46.232.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: okaya@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id BC556601A8; Sun, 6 May 2018 10:31:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1525602672; bh=HQjLOiwr98SWRuB6iJ3kU6nBPEixQtJ84/+eu4jPXEE=; h=From:To:Cc:Subject:Date:From; b=P44nICoUbUojXtFOwY0GiVmwI8XTak+Tnn8aD4EFTn5VeOSlIpQFVtM6lvCXTPlb5 6kClJAB6GconfwdKinJ7BvtgKDZ7NoFpEdQ1KXlQM8nye3Cg2KMIIXQ6Vk2MyhqU3x bmjCu8o5R6H4+LwOv7RBXZS3V4NTVHRNPBwCEzmw= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org BC556601A8 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=okaya@codeaurora.org From: Sinan Kaya To: linux-pci@vger.kernel.org, timur@codeaurora.org, sulrich@codeaurora.org Cc: linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Sinan Kaya , stable@vger.kernel.org, Bjorn Helgaas , Mika Westerberg , Greg Kroah-Hartman , Kees Cook , Markus Elfring , Keith Busch , Lukas Wunner , linux-kernel@vger.kernel.org (open list) Subject: [PATCH] PCI: pciehp: Add quirk for QDF2400 Command Completed erratum Date: Sun, 6 May 2018 06:30:53 -0400 Message-Id: <1525602662-1873-1-git-send-email-okaya@codeaurora.org> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The QDF2400 controller does not set the Command Completed bit unless writes to the Slot Command register change "Control" bits. Command Completed is never set for writes that only change software notification "Enable" bits. This results in timeouts like this: pciehp 0000:00:00.0:pcie004: Timeout on hotplug command 0x1038 Cc: stable@vger.kernel.org Signed-off-by: Sinan Kaya --- drivers/pci/hotplug/pciehp_hpc.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c index e70eba5..974a8f1 100644 --- a/drivers/pci/hotplug/pciehp_hpc.c +++ b/drivers/pci/hotplug/pciehp_hpc.c @@ -914,3 +914,9 @@ static void quirk_cmd_compl(struct pci_dev *pdev) } DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_INTEL, PCI_ANY_ID, PCI_CLASS_BRIDGE_PCI, 8, quirk_cmd_compl); + +DECLARE_PCI_FIXUP_CLASS_EARLY(0x17cb, 0x400, + PCI_CLASS_BRIDGE_PCI, 8, quirk_cmd_compl); + +DECLARE_PCI_FIXUP_CLASS_EARLY(0x17cb, 0x401, + PCI_CLASS_BRIDGE_PCI, 8, quirk_cmd_compl); -- 2.7.4