Received: by 10.192.165.148 with SMTP id m20csp3039773imm; Mon, 7 May 2018 05:44:25 -0700 (PDT) X-Google-Smtp-Source: AB8JxZq50D768+6E1yCtUntPR7E4yLb/tj9YRVmlhESDFvPo6cgVzfCkQzrtWe0S0X4YtbG630xW X-Received: by 2002:a63:7351:: with SMTP id d17-v6mr29221452pgn.297.1525697065759; Mon, 07 May 2018 05:44:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1525697065; cv=none; d=google.com; s=arc-20160816; b=mVvsegnV4OH4Zzzom68ZUhEyM5q+Gvivc6+5FldDFyLGgdFv/Yebohcmp+l2ePmdsP iyVxK+QtDfdv/G8qme0oAxi146OQDXKgfMgr3ZyuHneUSJXFuO5ue+r438RXRurBMsk3 CDD44SYL27S2umJU8jAcOp07u+00UM9HQAxxosqM3iA8M1mN36kqQYf8xORcDvDLHw9e f0GfdFuPNBhG/eaw4BmcKn5Ha7nDmvzql2xsgBk5vRD29dF2X9t+d5JKuxlSC3h2rp0g Vchwd14cWtRS9AKRq/yqkNaJ+WasmZzdWiXoSCmywDn2m37nH9VS3uKqEoPhN9k9BZjA nTAQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:organization:in-reply-to :content-disposition:mime-version:references:message-id:subject:cc :to:from:date:arc-authentication-results; bh=MVnyYPJsXErF0QDVEWoLtYMiHqEmi91rT+zPSeoF3xU=; b=TWYExVKJNEzLwnyypWV5sCuuHvdyBGLiRaySEwt8XrHFlJfjp+VPT2rFE/E7xRxhcO YRlNSiTLAZ1sTK+eftujz8pmi0D5oJfWTFBeGe5/yotn8pnxGf4/T2Br7dBn5bRW8Ope BBfX2fyPyZXL8umm9/S9tY4jwxfLoW+NI9+LWfCUjItJVcEjixrRTI1JKJHzpFdDU+7T 2uxEwAt6O7fXu2VMiVBE3Dwf8Wc28ppuCtcG+AkNkm83YkNTIYfK6V2Mqfslxt+rj4As 3WBkFMwC8CfZLfnfYMYrb23JNMZLXhny8tLR/tfJbh9DErtnjWVQL+ab1b/YbF2noHuf hvIg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id t85-v6si17610354pgb.42.2018.05.07.05.44.11; Mon, 07 May 2018 05:44:25 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752274AbeEGMn5 (ORCPT + 99 others); Mon, 7 May 2018 08:43:57 -0400 Received: from mga05.intel.com ([192.55.52.43]:44043 "EHLO mga05.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751848AbeEGMnz (ORCPT ); Mon, 7 May 2018 08:43:55 -0400 X-Amp-Result: UNKNOWN X-Amp-Original-Verdict: FILE UNKNOWN X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 07 May 2018 05:43:55 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.49,373,1520924400"; d="scan'208";a="39030297" Received: from lahna.fi.intel.com (HELO lahna) ([10.237.72.157]) by orsmga007.jf.intel.com with SMTP; 07 May 2018 05:43:50 -0700 Received: by lahna (sSMTP sendmail emulation); Mon, 07 May 2018 15:43:49 +0300 Date: Mon, 7 May 2018 15:43:49 +0300 From: Mika Westerberg To: Sinan Kaya Cc: linux-pci@vger.kernel.org, timur@codeaurora.org, sulrich@codeaurora.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, stable@vger.kernel.org, Bjorn Helgaas , Greg Kroah-Hartman , Kees Cook , Markus Elfring , Keith Busch , Lukas Wunner , open list Subject: Re: [PATCH] PCI: pciehp: Add quirk for QDF2400 Command Completed erratum Message-ID: <20180507124349.GC2879@lahna.fi.intel.com> References: <1525602662-1873-1-git-send-email-okaya@codeaurora.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1525602662-1873-1-git-send-email-okaya@codeaurora.org> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo User-Agent: Mutt/1.9.3 (2018-01-21) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sun, May 06, 2018 at 06:30:53AM -0400, Sinan Kaya wrote: > The QDF2400 controller does not set the Command Completed bit unless > writes to the Slot Command register change "Control" bits. Command > Completed is never set for writes that only change software notification > "Enable" bits. This results in timeouts like this: > > pciehp 0000:00:00.0:pcie004: Timeout on hotplug command 0x1038 > > Cc: stable@vger.kernel.org > Signed-off-by: Sinan Kaya Reviewed-by: Mika Westerberg