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[209.132.180.67]) by mx.google.com with ESMTP id h8-v6si22391122pls.502.2018.05.07.06.38.46; Mon, 07 May 2018 06:39:00 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=wAWyczcH; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752296AbeEGNiJ (ORCPT + 99 others); Mon, 7 May 2018 09:38:09 -0400 Received: from mail.kernel.org ([198.145.29.99]:55976 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752220AbeEGNiH (ORCPT ); Mon, 7 May 2018 09:38:07 -0400 Received: from mail-qt0-f176.google.com (mail-qt0-f176.google.com [209.85.216.176]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 8D61521741; Mon, 7 May 2018 13:38:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1525700285; bh=GZ0Vqg7r7Bx1ZMw7QLMLo7EPtZHfuLNTWdmu88xt69k=; h=In-Reply-To:References:From:Date:Subject:To:Cc:From; b=wAWyczcH1nL7OqoPwkjo+1nRdy/NwMloPnIn9SK+SJCZlpP19inajdufRQ9k/9Nif fmpi2bXznrMuRdVTAeex3PDH5j4q94fcFaawrGr37XinHoW5TXYSckdtPcwQ9H+6wa qWbXx0S9K+M3jaPqMeTmRy8DErxtJ4T8M8OgbZZ0= Received: by mail-qt0-f176.google.com with SMTP id g13-v6so36215015qth.8; Mon, 07 May 2018 06:38:05 -0700 (PDT) X-Gm-Message-State: ALQs6tAQW4LiwpRZm6BXh7MBFmn54qEqNQNMu073FW43PgIR2a88FxtK tnkyEpj614CUCzWjRPJW8Dzp1wd28DXbuKlqwg== X-Received: by 2002:a0c:aa9a:: with SMTP id f26-v6mr33711139qvb.106.1525700284769; Mon, 07 May 2018 06:38:04 -0700 (PDT) MIME-Version: 1.0 Received: by 10.12.155.2 with HTTP; Mon, 7 May 2018 06:37:44 -0700 (PDT) In-Reply-To: <20180505012513.GJ13402@sirena.org.uk> References: <20180501213114.20183-1-robh@kernel.org> <74d495d8-04e2-fb7d-7d07-0905fbc8a6cf@arm.com> <20180505012513.GJ13402@sirena.org.uk> From: Rob Herring Date: Mon, 7 May 2018 08:37:44 -0500 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [RFC PATCH] driver core: make deferring probe forever optional To: Mark Brown Cc: Robin Murphy , "linux-kernel@vger.kernel.org" , devicetree@vger.kernel.org, boot-architecture@lists.linaro.org, Stephen Boyd , Greg Kroah-Hartman , Linus Walleij , Alexander Graf , Grant Likely , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, May 4, 2018 at 8:25 PM, Mark Brown wrote: > On Wed, May 02, 2018 at 07:49:57PM +0100, Robin Murphy wrote: > >> I guess there's also the possibility that a single driver may want multiple >> behaviours, if e.g. if SoC variants A and B have some identical peripherals >> but slightly different pinctrl/IOMMU/etc. hardware such that A has workable >> default behaviour and can be treated as optional, whereas B absolutely must >> be controlled by the kernel for the consumers to function properly, and they >> *should* defer forever otherwise. I think that would pretty much demand some >> sort of explicitly-curated white/blacklist setup at the subsystem or driver >> level. > > Different board variants, and possibly even different bootloaders might > also be an issue here - a vendor bootloader might do pinmuxing that an > upstream bootloader doesn't for example. In some cases the pinmuxing > even depends on the boot method with things only getting configured if > the bootloader wanted to use them. I think this is going to be too big of a hammer for pinctrl at least. My current thought is to define a pinctrl DT property to indicate pins are configured already which the OS can use to decide if pinctrl is optional or not. I'd prefer to keep it simple and be a per pin controller flag even though this is quite possibly a per client or pin group state (as you say, the bootloader may only configure what it uses). Making this per pin group could be a lot of nodes and difficult to really get right without testing. Making it per pin controller could make drivers fail in less predictable ways if their pins are not configured. Rob