Received: by 10.192.165.148 with SMTP id m20csp3777084imm; Mon, 7 May 2018 19:37:09 -0700 (PDT) X-Google-Smtp-Source: AB8JxZpLi5q8baB+I7OjxaTtdRjJoOgLfll3oZxAx5E9M181yuZXl0t4ddaIWgjAZu339yulosed X-Received: by 2002:a17:902:407:: with SMTP id 7-v6mr39840537ple.47.1525747029391; Mon, 07 May 2018 19:37:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1525747029; cv=none; d=google.com; s=arc-20160816; b=ZECH0lsPumxI9UA1BrYWsib2Z0EK1XzeV/UC2wAVhFhaCckphw7Vze2LRIqFzOhgbM ysPfdYaartWzPrz3hlfdI04oKhri2lmI0fcMKX/vJo4xBNxZTKezozdt7wi7R4xbPQXX 2ikHTYRUj13cxUFeW0TvUP9EIfVbdQ7ASlsRwbN5Is0xWwOEXeM6bRn3WDjKfanvgJcy 6+FRGlZgW81VnS1cKxE3hxdtGwLDyFg3j2cBhkmOYpwXjjxF9Pu5Y9fqeWDQ84Ou3gHq B38YUGPOkAOtslccw4ERibJIw2GCpvYiYnnVN6GtTXiYQReV3/cujsldOhZR5PH4gO3E Uwig== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:in-reply-to :references:subject:cc:to:mime-version:user-agent:from:date :message-id:arc-authentication-results; bh=b82hla5M0c4HEHdEhH72F3ZEzNdCr/7oXnDmZUOeTWM=; b=stJmGcwDmw2nEYPhGNCqIJCmGXDVzFbhwDmckycUThtBgnr+HOm/FQ7b+L5dnMJIRO G7kK0swuIbQfewBwT6WLIXAZaKmDkSFBJtShLgnFAraJa1kvkoKorZCHLWBFB1xobO0t Tw7H6k9hez2VRxfVz+UQyXA5w0v0M0NXzIN6Bw4i5bM8PjVKw1FsF8ZfHnw/wwIAieU4 xeIjMM0IZ45d/fH6F5PlqOAlcGb7kEe6xLIlV7kc4Vl44ca3Y1dBu0eiHnTD1hkL3ZUb I0ghDwsCAbE/tm77UGITkW0b6Yz2uoGbO5NArfvVJU4lB8pTCnZPMN9cgdTXePgrfTwq /AUA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 88-v6si22329402pla.315.2018.05.07.19.36.54; Mon, 07 May 2018 19:37:09 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753917AbeEHCcF (ORCPT + 99 others); Mon, 7 May 2018 22:32:05 -0400 Received: from regular1.263xmail.com ([211.150.99.131]:55926 "EHLO regular1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753692AbeEHCcB (ORCPT ); Mon, 7 May 2018 22:32:01 -0400 Received: from jeffy.chen?rock-chips.com (unknown [192.168.167.140]) by regular1.263xmail.com (Postfix) with ESMTP id B5C106299; Tue, 8 May 2018 10:31:54 +0800 (CST) X-263anti-spam: KSV:0;BIG:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ADDR-CHECKED4: 1 X-ABS-CHECKED: 1 X-SKE-CHECKED: 1 X-ANTISPAM-LEVEL: 2 Received: from [172.16.22.179] (localhost [127.0.0.1]) by smtp.263.net (Postfix) with ESMTPA id 1919C3B6; Tue, 8 May 2018 10:31:48 +0800 (CST) X-IP-DOMAINF: 1 X-RL-SENDER: jeffy.chen@rock-chips.com X-FST-TO: briannorris@chromium.org X-SENDER-IP: 103.29.142.67 X-LOGIN-NAME: jeffy.chen@rock-chips.com X-UNIQUE-TAG: X-ATTACHMENT-NUM: 0 X-SENDER: cjf@rock-chips.com X-DNS-TYPE: 0 Received: from [172.16.22.179] (unknown [103.29.142.67]) by smtp.263.net (Postfix) whith ESMTP id 10330940258; Tue, 08 May 2018 10:31:54 +0800 (CST) Message-ID: <5AF10C10.1070003@rock-chips.com> Date: Tue, 08 May 2018 10:31:44 +0800 From: JeffyChen User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:19.0) Gecko/20130126 Thunderbird/19.0 MIME-Version: 1.0 To: Brian Norris CC: linux-kernel@vger.kernel.org, heiko@sntech.de, linux-rockchip@lists.infradead.org, Linus Walleij , linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Doug Anderson Subject: Re: [RESEND PATCH] pinctrl: rockchip: Disable interrupt when changing it's capability References: <20180503065553.7762-1-jeffy.chen@rock-chips.com> <20180507221511.GA6448@rodete-desktop-imager.corp.google.com> <5AF0FF18.1050905@rock-chips.com> <20180508015623.GA61455@rodete-desktop-imager.corp.google.com> In-Reply-To: <20180508015623.GA61455@rodete-desktop-imager.corp.google.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Brian, On 05/08/2018 09:56 AM, Brian Norris wrote: > On Tue, May 08, 2018 at 09:36:24AM +0800, Jeffy Chen wrote: >> On 05/08/2018 06:15 AM, Brian Norris wrote: >>> On the other hand...this also implies there may be a race condition >>> there, where we might lose an interrupt if there is an edge between the >>> re-configuration of the polarity in rockchip_irq_demux() and the >>> clearing/handling of the interrupt (handle_edge_irq() -> >>> chip->irq_ack()). If we have an edge between there, then we might ack >>> it, but leave the polarity such that we aren't ready for the next >>> (inverted) edge. >> >> if let me guess, the unexpected irq we saw is the hardware trying to avoid >> losing irq? for example, we set a EDGE_RISING, and the hardware saw the gpio >> is already high, then though it might lost an irq, so fake one for safe? > > I won't pretend to know what the IC designers were doing, but I don't > think that would resolve the problem I'm talking about. The sequence is > something like: > 1. EDGE_BOTH IRQ occurs (e.g., low to high) > 2. reconfigure polarity in rockchip_irq_demux() (polarity=low) > 3. continue to handle_edge_irq() > 4. another HW edge occurs (e.g., high to low) > 5. handle_edge_irq() (from 3) acks (clears) IRQ (before a subsequent > rockchip_irq_demux() gets a chance to run and flip the polarity) > ... > > Now the polarity is still low, but the next trigger should be a > low-to-high edge. oops, i see the problem. so what if we do these: 1/ edge irq triggered 2/ read gpio level 3/ handle irq(ack irq) 4/ toggle edge mode(with a while gpio level check) if the gpio changed in 2/ -> 3/, the 4/ will trigger an irq when writing GPIO_INT_POLARITY(which is what we are trying to avoid in the set_type case) but this would not work if i'm wrong about how the HW fake an irq when changing POLARITY... or maybe we could just check the gpio status again after handle_edge_irq, and correct the polarity in this case > >> i'll try to confirm it with IC guys. > > Brian > > >