Received: by 10.192.165.148 with SMTP id m20csp4136997imm; Tue, 8 May 2018 03:40:17 -0700 (PDT) X-Google-Smtp-Source: AB8JxZoE8+EdvGOUlw4/PKohGtWkV71M0Cy0j4QbU9KcDiVZYzCqNnnxcuobS00pyi7U7RO4v4i9 X-Received: by 10.98.147.200 with SMTP id r69mr39544025pfk.59.1525776017381; Tue, 08 May 2018 03:40:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1525776017; cv=none; d=google.com; s=arc-20160816; b=gIt8sEV4P+3pUmNfqUKNAY5VnGafce6Z+4w/C9nr02n4P3YHE2YSHZqlEbXtLUVIUi kE1Sb/g8Uwir5kT7zAgTwwJUpsdzDOudZqSoMB2N1esrhVicfUNvjFEp/nlHPFMjxbfJ es+Jk7ofDt8RJfXfnYWmiYIWdXQrGlNH9q6gQ2Gp6DqKQ1lz/DEMjmRpVN8rfqeKoFyH 4GGkBEol7iD5Ga14cS/NPvb8HpjU0Gam0sjmTRtERg9Nna/z9cljUZu3gwMxtbR5qZ7j r7Ft6yMAz1gxDZcShFcPjJEZvBlddkfo8GEGvhw55MoXMI+i5njmMa+q6zOFu+OSvo80 122w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:in-reply-to :content-disposition:mime-version:references:message-id:subject:cc :to:from:date:dkim-signature:arc-authentication-results; bh=7JPtmtrhnCStd8hOzdEUO0FWYeYXwUDGeGiHXikuR2c=; b=CqbbMuL6LjXSh/8yU8lEeMTmvTP9SKCUG/D/ZtsnwSatT4FjEqNs9AK+zNvpeBa6nK uxo+wHBQ3O3hMAdHu8n4S+GVIEW1JEyBbh6oUzwKtd0MDB6rZqVpJONjwr5Ehb/gmbDo 8HhERn8SiWF2ZNnTJqmJ8m4eVBPOm2KX8zLvUn44MouvD8bdbFExixQI65SdOwbQNibx cn0iQv28DhGFaG2i86zzbnPXCrvpDRAjMRfQFZQ79z1aHn8wWH3QriBTCWXw4qJlJEc3 rH9aUqPjkVok2oMVM0j6qJ6XV1W3Emahy1JLn85OKpGsoOPcljFRWq9tCTArxk/FJ8pA by3w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=h577QV5G; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id t11-v6si19029487pgn.337.2018.05.08.03.40.03; Tue, 08 May 2018 03:40:17 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=h577QV5G; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932349AbeEHKjv (ORCPT + 99 others); Tue, 8 May 2018 06:39:51 -0400 Received: from mail-wr0-f193.google.com ([209.85.128.193]:44391 "EHLO mail-wr0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932261AbeEHKjs (ORCPT ); Tue, 8 May 2018 06:39:48 -0400 Received: by mail-wr0-f193.google.com with SMTP id y15-v6so20051066wrg.11 for ; Tue, 08 May 2018 03:39:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=7JPtmtrhnCStd8hOzdEUO0FWYeYXwUDGeGiHXikuR2c=; b=h577QV5GbMoCNwSlVTtFqVgF2B1kK2ZZdqyI6PDRKPBLCHQL8nzJiD2izLmQh6jQsU qFg4TWcbTk/YpatoszBESnI/+Ao4EUCSZDFBe/vtMr1S/i3gj5Qf7ierpwsReO3wY/Xj K9gKrSEYWO4DRav89pEZLvQkAR63S7tWY0Qkc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=7JPtmtrhnCStd8hOzdEUO0FWYeYXwUDGeGiHXikuR2c=; b=teoXeypfmiPYur9QmTQlLyBLqMMJrIWNW2wMnnfH1gZoS8mxVrPl4+Avt51Jnttl++ VW8ZIDnKwQHqebpssToeHbIiG+Ip95hx7CJOM9L5jIewQF78SKXb83xGduAKOQmAtQje y/+oQbs+yaSZepiDfMWzONGqVET31d6INOehTTavBqnPCt8GmoP2Q/pwIBoC+wZLJxrw J5YRpn8mUMj9sIGf8ksFj48urXpVdvEF5hhPgkljdtymnP5+e2QDZp+mBDfZjmllp0fW FzJ7eWQifxcGQqO2siEtZCXQrCAltVnnZGPtlx5PRE6VOSv5O+21v56nlJ9+Jm5gnGkV GN/g== X-Gm-Message-State: ALQs6tAbd4yUtG3pEetfev38iE+S4nNSb51LBxxMSP8nFcFPHO+0KshM 06q0ikrGV4YwOj6d1t9q7rg1Pw== X-Received: by 2002:adf:9444:: with SMTP id 62-v6mr31206878wrq.264.1525775987349; Tue, 08 May 2018 03:39:47 -0700 (PDT) Received: from holly.lan (cpc141214-aztw34-2-0-cust773.18-1.cable.virginm.net. [86.9.19.6]) by smtp.gmail.com with ESMTPSA id t198sm11325145wmt.23.2018.05.08.03.39.46 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 08 May 2018 03:39:46 -0700 (PDT) Date: Tue, 8 May 2018 11:39:44 +0100 From: Daniel Thompson To: Kiran Gunda Cc: bjorn.andersson@linaro.org, Lee Jones , Jingoo Han , Bartlomiej Zolnierkiewicz , dri-devel@lists.freedesktop.org, linux-fbdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-leds@vger.kernel.org Subject: Re: [PATCH V2 4/5] backlight: qcom-wled: Add support for OVP interrupt handling Message-ID: <20180508103944.qib7ax3sgzhzacmb@holly.lan> References: <1525342352-25072-1-git-send-email-kgunda@codeaurora.org> <1525342352-25072-5-git-send-email-kgunda@codeaurora.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1525342352-25072-5-git-send-email-kgunda@codeaurora.org> User-Agent: NeoMutt/20180323 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, May 03, 2018 at 03:42:31PM +0530, Kiran Gunda wrote: > WLED peripheral has over voltage protection(OVP) circuitry and the OVP > fault is notified through an interrupt. Though this fault condition rising > is due to an incorrect hardware configuration is mitigated in the hardware, > it still needs to be detected and handled. Add support for it. Why detect and handle it? The interrupt handler doesn't appear to do anything other than clear the interrupt... and it appears that the interrupt can be masked. > When WLED module is enabled, keep OVP fault interrupt disabled for 10 ms to > account for soft start delay. > > Signed-off-by: Kiran Gunda > --- > drivers/video/backlight/qcom-wled.c | 118 +++++++++++++++++++++++++++++++++++- > 1 file changed, 116 insertions(+), 2 deletions(-) > > diff --git a/drivers/video/backlight/qcom-wled.c b/drivers/video/backlight/qcom-wled.c > index 2cfba77..80ae084 100644 > --- a/drivers/video/backlight/qcom-wled.c > +++ b/drivers/video/backlight/qcom-wled.c > @@ -23,14 +23,20 @@ > > /* From DT binding */ > #define WLED_DEFAULT_BRIGHTNESS 2048 > - > +#define WLED_SOFT_START_DLY_US 10000 > #define WLED3_SINK_REG_BRIGHT_MAX 0xFFF > > /* WLED3 Control registers */ > #define WLED3_CTRL_REG_FAULT_STATUS 0x08 > +#define WLED3_CTRL_REG_ILIM_FAULT_BIT BIT(0) > +#define WLED3_CTRL_REG_OVP_FAULT_BIT BIT(1) > +#define WLED4_CTRL_REG_SC_FAULT_BIT BIT(2) > + > +#define WLED3_CTRL_REG_INT_RT_STS 0x10 > > #define WLED3_CTRL_REG_MOD_EN 0x46 > #define WLED3_CTRL_REG_MOD_EN_MASK BIT(7) > +#define WLED3_CTRL_REG_MOD_EN_BIT BIT(7) > > #define WLED3_CTRL_REG_FREQ 0x4c > #define WLED3_CTRL_REG_FREQ_MASK GENMASK(3, 0) > @@ -161,9 +167,12 @@ struct wled { > u32 short_count; > const int *version; > int short_irq; > + int ovp_irq; > bool force_mod_disable; > + bool ovp_irq_disabled; > > struct wled_config cfg; > + struct delayed_work ovp_work; > int (*wled_set_brightness)(struct wled *wled, u16 brightness); > int (*wled_sync_toggle)(struct wled *wled); > }; > @@ -209,6 +218,32 @@ static int wled4_set_brightness(struct wled *wled, u16 brightness) > return 0; > } > > +static void wled_ovp_work(struct work_struct *work) > +{ > + u32 val; > + int rc; > + > + struct wled *wled = container_of(work, > + struct wled, ovp_work.work); > + > + rc = regmap_read(wled->regmap, wled->ctrl_addr + WLED3_CTRL_REG_MOD_EN, > + &val); > + if (rc < 0) > + return; > + > + if (val & WLED3_CTRL_REG_MOD_EN_BIT) { > + if (wled->ovp_irq > 0 && wled->ovp_irq_disabled) { > + enable_irq(wled->ovp_irq); > + wled->ovp_irq_disabled = false; > + } > + } else { > + if (wled->ovp_irq > 0 && !wled->ovp_irq_disabled) { > + disable_irq(wled->ovp_irq); > + wled->ovp_irq_disabled = true; > + } > + } > +} > + > static int wled_module_enable(struct wled *wled, int val) > { > int rc; > @@ -220,7 +255,12 @@ static int wled_module_enable(struct wled *wled, int val) > WLED3_CTRL_REG_MOD_EN, > WLED3_CTRL_REG_MOD_EN_MASK, > WLED3_CTRL_REG_MOD_EN_MASK); > - return rc; > + if (rc < 0) > + return rc; > + > + schedule_delayed_work(&wled->ovp_work, WLED_SOFT_START_DLY_US); > + > + return 0; > } > > static int wled3_sync_toggle(struct wled *wled) > @@ -346,6 +386,36 @@ static irqreturn_t wled_short_irq_handler(int irq, void *_wled) > return IRQ_HANDLED; > } > > +static irqreturn_t wled_ovp_irq_handler(int irq, void *_wled) > +{ > + struct wled *wled = _wled; > + int rc; > + u32 int_sts, fault_sts; > + > + rc = regmap_read(wled->regmap, > + wled->ctrl_addr + WLED3_CTRL_REG_INT_RT_STS, &int_sts); > + if (rc < 0) { > + dev_err(wled->dev, "Error in reading WLED3_INT_RT_STS rc=%d\n", > + rc); > + return IRQ_HANDLED; > + } > + > + rc = regmap_read(wled->regmap, wled->ctrl_addr + > + WLED3_CTRL_REG_FAULT_STATUS, &fault_sts); > + if (rc < 0) { > + dev_err(wled->dev, "Error in reading WLED_FAULT_STATUS rc=%d\n", > + rc); > + return IRQ_HANDLED; > + } > + > + if (fault_sts & > + (WLED3_CTRL_REG_OVP_FAULT_BIT | WLED3_CTRL_REG_ILIM_FAULT_BIT)) > + dev_dbg(wled->dev, "WLED OVP fault detected, int_sts=%x fault_sts= %x\n", > + int_sts, fault_sts); > + > + return IRQ_HANDLED; > +} > + > static int wled3_setup(struct wled *wled) > { > u16 addr; > @@ -821,6 +891,44 @@ static int wled_configure_short_irq(struct wled *wled, > return rc; > } > > +static int wled_configure_ovp_irq(struct wled *wled, > + struct platform_device *pdev) > +{ > + int rc = 0; > + u32 val; > + > + if (*wled->version == WLED_PM8941) > + return 0; > + > + wled->ovp_irq = platform_get_irq_byname(pdev, "ovp"); > + if (wled->ovp_irq < 0) { > + dev_dbg(&pdev->dev, "ovp irq is not used\n"); > + return 0; > + } > + > + rc = devm_request_threaded_irq(wled->dev, wled->ovp_irq, NULL, > + wled_ovp_irq_handler, IRQF_ONESHOT, > + "wled_ovp_irq", wled); > + if (rc < 0) { > + dev_err(wled->dev, "Unable to request ovp_irq (err:%d)\n", > + rc); > + return 0; > + } > + > + rc = regmap_read(wled->regmap, wled->ctrl_addr + > + WLED3_CTRL_REG_MOD_EN, &val); > + if (rc < 0) > + return rc; > + > + /* Keep OVP irq disabled until module is enabled */ > + if (!rc && !(val & WLED3_CTRL_REG_MOD_EN_MASK)) { > + disable_irq(wled->ovp_irq); > + wled->ovp_irq_disabled = true; > + } > + > + return rc; > +} > + > static const struct backlight_ops wled_ops = { > .update_status = wled_update_status, > }; > @@ -874,10 +982,16 @@ static int wled_probe(struct platform_device *pdev) > } > } > > + INIT_DELAYED_WORK(&wled->ovp_work, wled_ovp_work); > + > rc = wled_configure_short_irq(wled, pdev); > if (rc < 0) > return rc; > > + rc = wled_configure_ovp_irq(wled, pdev); > + if (rc < 0) > + return rc; > + > val = WLED_DEFAULT_BRIGHTNESS; > of_property_read_u32(pdev->dev.of_node, "default-brightness", &val); > > -- > The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, > a Linux Foundation Collaborative Project >