Received: by 10.192.165.148 with SMTP id m20csp4212226imm; Tue, 8 May 2018 05:01:56 -0700 (PDT) X-Google-Smtp-Source: AB8JxZo/aoO3tBCqcw5HCnTE/t3zG6QuqpS5xhqsF1SPYsXd2239CmBNfUOsKTWNjCyLFE4hItZc X-Received: by 2002:a17:902:6f16:: with SMTP id w22-v6mr40570876plk.216.1525780916596; Tue, 08 May 2018 05:01:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1525780916; cv=none; d=google.com; s=arc-20160816; b=x5CbmyoUX2UqfzbpR6JXrHEstNqCK26qA/BHN/R6asmGn6DaS1inYe+W0RvWaGjTTu XL5l2Zb3kY6h0BPD52IQJzXRqdTFvHOnqE2e7Ibt+NqsqycOt6KI0R+tPwee6XFvUcOb 3exBzJpuaI8jsfgEbb32KBJp9l4LRR22tomcpLUmXBHKmn6vyHDpeTqGzJ2dwTd9u7B5 psd9sOQ8D2UrhHJEZ64JpIDaPf2t6Zw1YPCCWf0RPhP+p6tewFbFNxzPRYprS+SROiWK vSBFHa7SaT9PCSuWB8OSbUwyt/sxcSG3hawFu9pZ+afKPLu444rWT9PCoVsLAmxAHdsU 4jEg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=/K88yh2GV9o3RAseXf6NqfPE9XDGTTeqtp2plFoha8Q=; b=qmPBtEtN82UwMCaAENE9uusJnvl8qMJ6id50fk1Ga6uW8Gw57Yg7VViJ6K53lu+Wjk XHD4sVCCnSjdlqDP8w58R1e4EKnRr6gRNjcyg4Hp5vQxcWJ3q/IyicHu+oshxRBMftUe XJa1JZVZYjaWaGHrhlip/mApd2nHCEdfvKPtFSBRiEZw8w4KKkoiPbaOd9RsaX6V/9aO 2NOxs4CtkWiHH33yPmmTu/BoWukX+foMK0twzqB532/pwNs+m9xo3kIKIE+1cqWfpgh8 jDSR+WhWc9h8C4UzHJU0/Dvg3PunBcAodGHq/yt1b0K2DsVdgA22/9qIwH8fZVjqlMXq Sv9w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 34-v6si8999761plp.409.2018.05.08.05.01.40; Tue, 08 May 2018 05:01:56 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754593AbeEHL5k (ORCPT + 99 others); Tue, 8 May 2018 07:57:40 -0400 Received: from gloria.sntech.de ([95.129.55.99]:38012 "EHLO gloria.sntech.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751617AbeEHL5i (ORCPT ); Tue, 8 May 2018 07:57:38 -0400 Received: from [46.183.103.8] (helo=phil.localnet) by gloria.sntech.de with esmtpsa (TLS1.1:DHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.80) (envelope-from ) id 1fG1FD-0002m3-VN; Tue, 08 May 2018 13:57:24 +0200 From: Heiko Stuebner To: linux-rockchip@lists.infradead.org Cc: djw@t-chip.com.cn, Mark Rutland , devicetree@vger.kernel.org, Wayne Chou , Catalin Marinas , Will Deacon , linux-kernel@vger.kernel.org, Rob Herring , linux-arm-kernel@lists.infradead.org, David Wu , William Wu , Rocky Hao , "David S. Miller" , Liang Chen , Joseph Chen Subject: Re: [PATCH v0 2/2] arm64: dts: rockchip: Add sdmmc UHS support for roc-rk3328-cc Date: Tue, 08 May 2018 13:57:17 +0200 Message-ID: <4418544.G3kHmbejD5@phil> In-Reply-To: <1525747704-8537-3-git-send-email-djw@t-chip.com.cn> References: <1525747704-8537-1-git-send-email-djw@t-chip.com.cn> <1525747704-8537-3-git-send-email-djw@t-chip.com.cn> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Levin, Am Dienstag, 8. Mai 2018, 04:48:24 CEST schrieb djw@t-chip.com.cn: > From: Levin Du > > In roc-rk3328-cc board, the signal voltage of sdmmc is supplied by > the vcc_sdio regulator, which is a mux between 1.8V and 3.3V, > controlled by a special output only gpio pin. > > However, this pin, not being a normal gpio in the rockchip pinctrl, > is set by bit 1 of system register GRF_SOC_CON10. Therefore a new > gpio controller using gpio-syscon driver is defined in order to use > regulator-gpio. > > If the signal voltage changes, the io domain needs to change > correspondingly. > > To use this feature, the following options are required in kernel config: > - CONFIG_GPIO_SYSCON=y > - CONFIG_POWER_AVS=y > - CONFIG_ROCKCHIP_IODOMAIN=y > > Signed-off-by: Levin Du > > --- > > arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts | 36 ++++++++++++++++++++++++++ > 1 file changed, 36 insertions(+) > > diff --git a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts > index 246c317..792cb04 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts > +++ b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts > @@ -14,6 +14,12 @@ > stdout-path = "serial2:1500000n8"; > }; > > + gpio_syscon10: gpio-syscon10 { > + compatible = "rockchip,rk3328-gpio-syscon10"; > + gpio-controller; > + #gpio-cells = <2>; > + }; > + please split this into a separate patch, move it to rk3328.dtsi and together with the suggestions from patch 1/2 make it look like grf: syscon@ff100000 { compatible = "rockchip,rk3328-grf", "syscon", "simple-mfd"; reg = <0x0 0xff100000 0x0 0x1000>; ... gpio_mute: gpio-mute { compatible = "rockchip,rk3328-gpio-mute"; gpio-controller; #gpio-cells = <2>; }; ... }; So making the gpio-controller a child of the grf node. And as this definition is not specific to the roc-cc it should be in the main devicetree file for the rk3328. > gmac_clkin: external-gmac-clock { > compatible = "fixed-clock"; > clock-frequency = <125000000>; > @@ -41,6 +47,19 @@ > vin-supply = <&vcc_io>; > }; > > + vcc_sdio: sdmmcio-regulator { > + compatible = "regulator-gpio"; > + gpios = <&gpio_syscon10 1 GPIO_ACTIVE_HIGH>; > + states = <1800000 0x1 > + 3300000 0x0>; > + regulator-name = "vcc_sdio"; > + regulator-type = "voltage"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <3300000>; > + regulator-always-on; > + vin-supply = <&vcc_sys>; > + }; > + > vcc_host1_5v: vcc_otg_5v: vcc-host1-5v-regulator { > compatible = "regulator-fixed"; > enable-active-high; > @@ -208,6 +227,18 @@ > }; > }; > > +&io_domains { > + status = "okay"; > + > + vccio1-supply = <&vcc_io>; > + vccio2-supply = <&vcc18_emmc>; > + vccio3-supply = <&vcc_sdio>; > + vccio4-supply = <&vcc_18>; > + vccio5-supply = <&vcc_io>; > + vccio6-supply = <&vcc_io>; > + pmuio-supply = <&vcc_io>; > +}; > + Please split this into a separate patch about "adding io-domain supplies for roc-cc" > &pinctrl { > pmic { > pmic_int_l: pmic-int-l { > @@ -227,10 +258,15 @@ > cap-mmc-highspeed; > cap-sd-highspeed; > disable-wp; > + sd-uhs-sdr12; > + sd-uhs-sdr25; > + sd-uhs-sdr50; > + sd-uhs-sdr104; please sort properties alphabetically, so between pinctrl-0 and vmmc-supply > max-frequency = <150000000>; > pinctrl-names = "default"; > pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>; > vmmc-supply = <&vcc_sd>; > + vqmmc-supply = <&vcc_sdio>; > status = "okay"; > }; Thanks Heiko