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[209.132.180.67]) by mx.google.com with ESMTP id g6-v6si20062099pgr.72.2018.05.08.06.27.59; Tue, 08 May 2018 06:28:13 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=iVcT13js; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932091AbeEHN1d (ORCPT + 99 others); Tue, 8 May 2018 09:27:33 -0400 Received: from mail-yb0-f194.google.com ([209.85.213.194]:41428 "EHLO mail-yb0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754223AbeEHN1a (ORCPT ); Tue, 8 May 2018 09:27:30 -0400 Received: by mail-yb0-f194.google.com with SMTP id l9-v6so11133202ybm.8; Tue, 08 May 2018 06:27:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=g4AjLqJM2GslmyJnXwiDtT0daU8Kyy4gveh23EkLx20=; b=iVcT13jsLDCyzyLgzMVdCENgEw89GIn+MnjYIFAdDe2/azvwf2DC7Sa7KtdRKt8kli N9EbF9lA/9jjQWqcbY95/OIR1CldrgF3K+se21mtvTgC8t4LNGuuApyNKYb2pU3QnHj1 +0Ac7H1+j1l7wu1rwXZb81X1z77db4eTlrfyXu92vDKZl+7kD4ysrjxXnKCOrJGJkT/k wV8PYo2AbIW2dQ5BxRufcde1ZdknC7mEjkXRhyoRQymVXcWXD/B4zWdkIIqdDXoVbVmD 1PU7hx/75Q56UI0FQ83J0g3sW50o3SxTyTUEGGs2eytSD1SceJZBl6ECx8CxwtOHJLjo RSwA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=g4AjLqJM2GslmyJnXwiDtT0daU8Kyy4gveh23EkLx20=; b=byj7v3MOOpxqeXf0LONXY0rm5UgGsttv+DIrlYZm7/XPXMsAvod2XjgMrsfH80nf1y DoIQsE69L3TmR/nxAcHrx2deSykKk34V3wBFm3Y6H2iKECWn8tp+FDhMZtIXlh63yk7g 1HPuDM41TTImehzm3Q5Ja1DtrgJHWLlcfkgdiM0sRrbzNknfowq7Ja9ZnFVOtpWERt7V rAG+YM5hVMrGqIIJP9L16inM9UWP1JvhAdBy9v0+DsNNfSL6+JTJmLrWfr1fWKnUuvRn To7EaqpzL+otsUNNT4uQv2GQLkU32mCohQogfLT9V1AG773vWJW2Kihg0kw16Va1SZ/o L4Zg== X-Gm-Message-State: ALKqPwdapaYf4VBMJWOUiJyOyce+oFWIqeIfm1tO2QUe/B3ZIGcRun/m /v/2o16XmEph9oRkcfilSNE= X-Received: by 2002:a25:c2c5:: with SMTP id s188-v6mr5329ybf.65.1525786050004; Tue, 08 May 2018 06:27:30 -0700 (PDT) Received: from localhost ([72.188.97.40]) by smtp.gmail.com with ESMTPSA id a200-v6sm11086471ywe.66.2018.05.08.06.27.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 08 May 2018 06:27:29 -0700 (PDT) From: William Breathitt Gray To: linus.walleij@linaro.org Cc: linux-gpio@vger.kernel.org, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, William Breathitt Gray Subject: [PATCH v2 4/7] gpio: gpio-mm: Utilize for_each_set_port_word macro Date: Tue, 8 May 2018 09:27:24 -0400 Message-Id: X-Mailer: git-send-email 2.17.0 In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Replace boilerplate code in get_multiple/set_multiple callbacks with for_each_set_port_word macro to simplify code and improve clarity. Signed-off-by: William Breathitt Gray --- drivers/gpio/gpio-gpio-mm.c | 67 +++++++++---------------------------- 1 file changed, 16 insertions(+), 51 deletions(-) diff --git a/drivers/gpio/gpio-gpio-mm.c b/drivers/gpio/gpio-gpio-mm.c index b56ff2efbf36..0ede33e7e251 100644 --- a/drivers/gpio/gpio-gpio-mm.c +++ b/drivers/gpio/gpio-gpio-mm.c @@ -172,46 +172,23 @@ static int gpiomm_gpio_get(struct gpio_chip *chip, unsigned int offset) return !!(port_state & mask); } +static const size_t ports[] = { 0, 1, 2, 4, 5, 6 }; + static int gpiomm_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct gpiomm_gpio *const gpiommgpio = gpiochip_get_data(chip); size_t i; - static const size_t ports[] = { 0, 1, 2, 4, 5, 6 }; - const unsigned int gpio_reg_size = 8; - unsigned int bits_offset; - size_t word_index; - unsigned int word_offset; - unsigned long word_mask; - const unsigned long port_mask = GENMASK(gpio_reg_size - 1, 0); + size_t word; + unsigned int offset; unsigned long port_state; /* clear bits array to a clean slate */ bitmap_zero(bits, chip->ngpio); - /* get bits are evaluated a gpio port register at a time */ - for (i = 0; i < ARRAY_SIZE(ports); i++) { - /* gpio offset in bits array */ - bits_offset = i * gpio_reg_size; - - /* word index for bits array */ - word_index = BIT_WORD(bits_offset); - - /* gpio offset within current word of bits array */ - word_offset = bits_offset % BITS_PER_LONG; - - /* mask of get bits for current gpio within current word */ - word_mask = mask[word_index] & (port_mask << word_offset); - if (!word_mask) { - /* no get bits in this port so skip to next one */ - continue; - } - - /* read bits from current gpio port */ + for_each_set_port_word(i, word, offset, mask, ARRAY_SIZE(ports), 8) { port_state = inb(gpiommgpio->base + ports[i]); - - /* store acquired bits at respective bits array offset */ - bits[word_index] |= port_state << word_offset; + bits[word] |= port_state << offset; } return 0; @@ -242,37 +219,25 @@ static void gpiomm_gpio_set_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct gpiomm_gpio *const gpiommgpio = gpiochip_get_data(chip); - unsigned int i; - const unsigned int gpio_reg_size = 8; - unsigned int port; - unsigned int out_port; + size_t i; + size_t word; + unsigned int offset; + unsigned int iomask; unsigned int bitmask; unsigned long flags; - /* set bits are evaluated a gpio register size at a time */ - for (i = 0; i < chip->ngpio; i += gpio_reg_size) { - /* no more set bits in this mask word; skip to the next word */ - if (!mask[BIT_WORD(i)]) { - i = (BIT_WORD(i) + 1) * BITS_PER_LONG - gpio_reg_size; - continue; - } - - port = i / gpio_reg_size; - out_port = (port > 2) ? port + 1 : port; - bitmask = mask[BIT_WORD(i)] & bits[BIT_WORD(i)]; + for_each_set_port_word(i, word, offset, mask, ARRAY_SIZE(ports), 8) { + iomask = mask[word] >> offset; + bitmask = iomask & (bits[word] >> offset); spin_lock_irqsave(&gpiommgpio->lock, flags); /* update output state data and set device gpio register */ - gpiommgpio->out_state[port] &= ~mask[BIT_WORD(i)]; - gpiommgpio->out_state[port] |= bitmask; - outb(gpiommgpio->out_state[port], gpiommgpio->base + out_port); + gpiommgpio->out_state[i] &= ~iomask; + gpiommgpio->out_state[i] |= bitmask; + outb(gpiommgpio->out_state[i], gpiommgpio->base + ports[i]); spin_unlock_irqrestore(&gpiommgpio->lock, flags); - - /* prepare for next gpio register set */ - mask[BIT_WORD(i)] >>= gpio_reg_size; - bits[BIT_WORD(i)] >>= gpio_reg_size; } } -- 2.17.0