Received: by 10.192.165.148 with SMTP id m20csp4306999imm; Tue, 8 May 2018 06:30:05 -0700 (PDT) X-Google-Smtp-Source: AB8JxZp6khbWb3m6vq9gnW212XGpjJhBGHHqhJoaeW7tPmj7/ugOq3Gmi+ATGMUG8D5SuBrfgcN7 X-Received: by 2002:a17:902:a702:: with SMTP id w2-v6mr21621757plq.8.1525786205333; Tue, 08 May 2018 06:30:05 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1525786205; cv=none; d=google.com; s=arc-20160816; b=vaAnSRuYD42rGymN+kso5U62brPbP9F2hOV0NeHbqabF+hdiEcUvQm421c/m4u7EO2 PSKJchIxMW/6MwzXOKI52a14nSSnzq4SitTnO6neJRz8+Ad2ACDXMuk8cCyhcq/5uweG 7bDhfDkrgHbPhCD1MBvWMQ4iMmcczKq5CyCRQAJuPG2XoYDMLMMWBf4sMY4besyrmQPR oJTJBuU5fqe/MZNG2qVrusE0lHM4ySj7EvIJrDc6C/gT8xrYeBFXeh2gvLo5Zb9M4XXo coNjdXVkb9zCq1Eo6pwBxkA27LEoZBR3MJC4TrASoX46yQ6DfBmmT9OW+HX/IVMXuBR0 tMFw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=IBIBNhSQ0ajv4mOvaURSmQs0HFlBxEAuRaVG0JJUT0Q=; b=psTXMZ+SZt9xoFZN/eYwDcqJHByCMqwqgzidSqcW1tT8H9vKb3gtHyaJopomjZe9XX SvCAfB6Rrx8m73BrAU5XCRHACeeRsgb66sfI6BRLdQYSrXsjo5P8orjgKwptTiRhmrtS wz5quaY0YPBJXoRKArm9jOeHlqCNh5xVqxGOdDXM+jqPZL5YxeO+cYP8TuTWKcPvcYFK nzus+6tosDUQNHITn7UwshqEcKTEeeSGq5Al4XdCV584YFFkBwauJQSq5d11vMTXj9w6 wNhplIPi2Ufd2T7FbxLDzIUAELF2nXoNNNqq3gyt3LejFpaFn4es+l5x/IW9wUcj0QmU 2Uiw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=nDY9zCXn; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a21-v6si4830163pgv.668.2018.05.08.06.29.50; Tue, 08 May 2018 06:30:05 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=nDY9zCXn; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932143AbeEHN15 (ORCPT + 99 others); Tue, 8 May 2018 09:27:57 -0400 Received: from mail-yw0-f195.google.com ([209.85.161.195]:43398 "EHLO mail-yw0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754099AbeEHN1z (ORCPT ); Tue, 8 May 2018 09:27:55 -0400 Received: by mail-yw0-f195.google.com with SMTP id r202-v6so9643595ywg.10; Tue, 08 May 2018 06:27:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=IBIBNhSQ0ajv4mOvaURSmQs0HFlBxEAuRaVG0JJUT0Q=; b=nDY9zCXnFlaXMj6oJFPEi+KVDuejhhH5WuVRH200yib8CoJNrLxLRjDu96n+vUgaps 4O3yhq1GvhuxFMztZ05+eLmAILJB7U61mjZFezTn0N5/sSRX41EWZA8UnejAq4FlSgLw EzByna0z8Ja622S9u7NtpI0fEhiKcZEx2xHO7sZUoNMobiYLr5vBE6nHg8PAY7/oOAiS DUD7gZK4bkRL/naMYLAQykikMEi7UkyziYReo1F7oELi1R/ACqLLv2DTDKFs4Eo6peYr eo+Y8BJdqJRnwU9K8zRn8JGko2/StosIG4SpiFL3mSoVB1mXpvzhKSs8l4zFK2cc2RNJ PSuQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=IBIBNhSQ0ajv4mOvaURSmQs0HFlBxEAuRaVG0JJUT0Q=; b=IlrnrR/0/f6kNIYiRB14THg4trFXYw7e/RSVmouyKw+M3uJ0k3j2gxfdOnsdjAml4/ VpPS38AaKxlAUA6SNlvS7wOnQKRocSeSrnCgY0Pu6ONNsibK/R2eQUsx7s1bVyQfwnD3 HBsfngknZeMeK+2f9I+FDe0uGaHV72O0m0CmfoI73mrxswy7cw0yQl+kAfuaXGQYNsli WUyYyAtfD3Y5U2CbrfM3yhXmJmS7ECkPQW72ZSBZ92I4WE7BnWLOFh4RhrKPjaghDRqC sWRK0vmmYF6aIz207xipd5WA/+eN+f8MroRdcXRGIQbsdN7yHgS33Uztz/7Z3MN7Ausg A0Vw== X-Gm-Message-State: ALQs6tBBnN6KTcJ9zA894v/eNh301LPM/d3aBEs55BnRQlF+mk3WkLQL uI3GHgLtWSM9bghFRqGO46cXYg== X-Received: by 2002:a81:6b0b:: with SMTP id g11-v6mr22424027ywc.249.1525786074145; Tue, 08 May 2018 06:27:54 -0700 (PDT) Received: from localhost ([72.188.97.40]) by smtp.gmail.com with ESMTPSA id z11-v6sm2080193ywb.3.2018.05.08.06.27.53 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 08 May 2018 06:27:53 -0700 (PDT) From: William Breathitt Gray To: linus.walleij@linaro.org Cc: linux-gpio@vger.kernel.org, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, William Breathitt Gray Subject: [PATCH v2 5/7] gpio: ws16c48: Utilize for_each_set_port_word macro Date: Tue, 8 May 2018 09:27:48 -0400 Message-Id: <7be4cbc599a8437e031a6f0286b765620d3713e7.1525785532.git.vilhelm.gray@gmail.com> X-Mailer: git-send-email 2.17.0 In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Replace boilerplate code in get_multiple/set_multiple callbacks with for_each_set_port_word macro to simplify code and improve clarity. Signed-off-by: William Breathitt Gray --- drivers/gpio/gpio-ws16c48.c | 66 +++++++++---------------------------- 1 file changed, 16 insertions(+), 50 deletions(-) diff --git a/drivers/gpio/gpio-ws16c48.c b/drivers/gpio/gpio-ws16c48.c index c7028eb0b8e1..ab8b36f3595c 100644 --- a/drivers/gpio/gpio-ws16c48.c +++ b/drivers/gpio/gpio-ws16c48.c @@ -134,42 +134,19 @@ static int ws16c48_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip); - const unsigned int gpio_reg_size = 8; - size_t i; - const size_t num_ports = chip->ngpio / gpio_reg_size; - unsigned int bits_offset; - size_t word_index; - unsigned int word_offset; - unsigned long word_mask; - const unsigned long port_mask = GENMASK(gpio_reg_size - 1, 0); + size_t port; + size_t word; + unsigned int offset; + const unsigned int port_size = 8; + const size_t num_ports = chip->ngpio / port_size; unsigned long port_state; /* clear bits array to a clean slate */ bitmap_zero(bits, chip->ngpio); - /* get bits are evaluated a gpio port register at a time */ - for (i = 0; i < num_ports; i++) { - /* gpio offset in bits array */ - bits_offset = i * gpio_reg_size; - - /* word index for bits array */ - word_index = BIT_WORD(bits_offset); - - /* gpio offset within current word of bits array */ - word_offset = bits_offset % BITS_PER_LONG; - - /* mask of get bits for current gpio within current word */ - word_mask = mask[word_index] & (port_mask << word_offset); - if (!word_mask) { - /* no get bits in this port so skip to next one */ - continue; - } - - /* read bits from current gpio port */ - port_state = inb(ws16c48gpio->base + i); - - /* store acquired bits at respective bits array offset */ - bits[word_index] |= port_state << word_offset; + for_each_set_port_word(port, word, offset, mask, num_ports, port_size) { + port_state = inb(ws16c48gpio->base + port); + bits[word] |= port_state << offset; } return 0; @@ -203,26 +180,19 @@ static void ws16c48_gpio_set_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip); - unsigned int i; - const unsigned int gpio_reg_size = 8; - unsigned int port; + size_t port; + size_t word; + unsigned int offset; + const unsigned int port_size = 8; + const size_t num_ports = chip->ngpio / port_size; unsigned int iomask; unsigned int bitmask; unsigned long flags; - /* set bits are evaluated a gpio register size at a time */ - for (i = 0; i < chip->ngpio; i += gpio_reg_size) { - /* no more set bits in this mask word; skip to the next word */ - if (!mask[BIT_WORD(i)]) { - i = (BIT_WORD(i) + 1) * BITS_PER_LONG - gpio_reg_size; - continue; - } - - port = i / gpio_reg_size; - + for_each_set_port_word(port, word, offset, mask, num_ports, port_size) { /* mask out GPIO configured for input */ - iomask = mask[BIT_WORD(i)] & ~ws16c48gpio->io_state[port]; - bitmask = iomask & bits[BIT_WORD(i)]; + iomask = (mask[word] >> offset) & ~ws16c48gpio->io_state[port]; + bitmask = iomask & (bits[word] >> offset); raw_spin_lock_irqsave(&ws16c48gpio->lock, flags); @@ -232,10 +202,6 @@ static void ws16c48_gpio_set_multiple(struct gpio_chip *chip, outb(ws16c48gpio->out_state[port], ws16c48gpio->base + port); raw_spin_unlock_irqrestore(&ws16c48gpio->lock, flags); - - /* prepare for next gpio register set */ - mask[BIT_WORD(i)] >>= gpio_reg_size; - bits[BIT_WORD(i)] >>= gpio_reg_size; } } -- 2.17.0