Received: by 10.192.165.148 with SMTP id m20csp5052251imm; Tue, 8 May 2018 21:04:56 -0700 (PDT) X-Google-Smtp-Source: AB8JxZoD6GxNfW2XKO4JuKbbo0CzFFbln5h2njTGc35KY1bherwx6S1zEt33X+xWDvC5qgfDwb59 X-Received: by 2002:a63:701d:: with SMTP id l29-v6mr33961203pgc.299.1525838696889; Tue, 08 May 2018 21:04:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1525838696; cv=none; d=google.com; s=arc-20160816; b=zjhnokwzX84uaQuQYcWbnQtTTRCcsP3bvoBJxpym+D5DpND8Hl3S6DNK7de1Cr2LTe bsGefljQ8K5bPasAnSvHzwwSGdCHq2LCiKcWWnMCBQOOiacqMXyTyG6voQmyzR3f1wEm nkmdMK+/ai+4YcSTvr18fXH6+o9/EgWYgaGRJlDzjVHzbCoVJWVi39ytNknwcI9MbNTH /OjdVUJ8RgkMFTMJgAUIngmtt0R9UpEfYiXVSCsXJ2m2kVVGAWn6JODefUkRrHN6axL3 Q1w4B6gkJmTZ4N5mpcOJzsZSaZsrjc92Gj2Ih76YAbLTO/GLjWzIP/vYtaZOJyYOzUac pKoA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:date:cc:to:from:subject:message-id :arc-authentication-results; bh=cw56yOFNL3QW3RmSfG2bKHFZa8D4dmftrqjtujnDeZ8=; b=kjybp+buEAo5WQohNgAbJGbhQeNuskAPqUuMaSHH/PIt2wEktYKD7P+W4fDq/NUx9y sCgw7TOPAqxQpocQuskaAlQKsYIui9ELylx2c5/6lpiyCff4YESucsiMmOUikHbZyClZ ceEeWIw3OhO3yNGZDOPkf1nyEC/7iByjapKvRY3Luc2Vu6wHnk+3x86SRNUDgyjRZWD2 8BR+NQwgnaR/J0QzVESDwYZGMkgTuVax5joWwWGXd+nociz5zsbdi6PTSJKhYkxPF8sz 4QzDmVK8wVfzIXpjiYhUg/l+XGQJL/yd48SoqEIp5W7c4I9lMU/mvgwk71K2KOxgOfMK K3yA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id t127-v6si45508pgc.519.2018.05.08.21.04.42; Tue, 08 May 2018 21:04:56 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751904AbeEIEEE (ORCPT + 99 others); Wed, 9 May 2018 00:04:04 -0400 Received: from gate.crashing.org ([63.228.1.57]:49021 "EHLO gate.crashing.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751099AbeEIEED (ORCPT ); Wed, 9 May 2018 00:04:03 -0400 Received: from localhost (localhost.localdomain [127.0.0.1]) by gate.crashing.org (8.14.1/8.14.1) with ESMTP id w49434Ud023038; Tue, 8 May 2018 23:03:05 -0500 Message-ID: <3117a5230fe7849e66d2d354f04ec3f24fccca0f.camel@kernel.crashing.org> Subject: Re: [PATCH] hwmon: (aspeed-pwm-tacho) Use 24MHz clock From: Benjamin Herrenschmidt To: Lei YU , Guenter Roeck Cc: Jean Delvare , Joel Stanley , Andrew Jeffery , Hardware Monitoring , linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, Linux Kernel Mailing List Date: Wed, 09 May 2018 14:03:04 +1000 In-Reply-To: References: <1525772367-20627-1-git-send-email-mine260309@gmail.com> <8a801894-4293-d2e8-4673-3d9ff5c2a5bb@roeck-us.net> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.1 (3.28.1-2.fc28) Mime-Version: 1.0 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 2018-05-09 at 11:50 +0800, Lei YU wrote: > On Wed, May 9, 2018 at 11:43 AM, Guenter Roeck wrote: > > > > I am not going to accept this change, period. This is not one, it is five > > steps > > backward. If "aspeed_set_clock_source(priv->regmap, 0)" changes the clock > > speed, > > or the clock source, read it later, and attach to the correct clock. If that > > doesn't work, fix the problem in the clock subsystem. Hacking the driver is > > just > > plain wrong. > > > > Also, if the idea in DT is to provide a different clock to the watchdog on > > purpose, > > maybe the call to "aspeed_set_clock_source(priv->regmap, 0)" is wrong. > > Exactly! > My first change (not sent to mailing list) is to remove the call of > "aspeed_set_clock_source(priv->regmap, 0)", instead, checking the clock > source, and use either 24M or the memory controller clock. > But that make things a bit more complicated and Aspeed suggests to use 24M > clock. So I sent this simplified change. > > It's OK to not accept this change, the fix in DT will fix the issue as well. Another option is to give *both* clock sources in the DT, since in HW they both eventually reach the IP block, and have the driver select which one it wants to use (that itself can also be in the DT). That way you can select 0 if you want and still use clk_get_rate() to know how fast it's ticking. Cheers, Ben.