Received: by 10.192.165.148 with SMTP id m20csp258425imm; Wed, 9 May 2018 12:09:44 -0700 (PDT) X-Google-Smtp-Source: AB8JxZqLtcIdACV6C2mv07nOUrhyFNCsr4n9qexPOHaiyQWK0xr0CQInmF1/FPGDwAQ89AJqr0o7 X-Received: by 2002:a17:902:4545:: with SMTP id m63-v6mr47356747pld.268.1525892984132; Wed, 09 May 2018 12:09:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1525892984; cv=none; d=google.com; s=arc-20160816; b=v8RxiBkDZMjOmmZlHKD9HiZegmyhkb/W8MewamcAmFGrkglz+o1oaglQm7miz36U3X s+lPEzE+GJnlXhDbuQpyb0bISofBcltY042Dz4LAbtG+5fUquzIMUU79O2Aipk8i3Xy2 2v5U12IUw1W5l6YgQPUpRXBPSj2ZCNZEUdzPTlG21GHq5IbaunRBf3gvO5YsfFTvzeQu BIPFO24Kbe/a6wP/mlYUSFuAq8nhG8fNPrigITvVk798Y5pOh0DNSs+dlJ30VnkmyBJD PpTubgfVcm6EOnxr/vg+wzxJf9Y9B5+IYQ1qvi1zxe3zc5Gl6PGrmjnOjVgsBhaMIHlT up1Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:in-reply-to :content-disposition:mime-version:references:message-id:subject:cc :to:from:date:dkim-signature:arc-authentication-results; bh=kJEkLeV2rtmIczx5NM0VqK7NJa/MEB7KYeAEhp09PLE=; b=FS09JiMXIxPhcSEqBd+nxkPFj+ZIAuxMRnpVeESQhmXpN1w5OgVmAfmepdMFrciWy8 nacB+OYORpq6c6BTzyowF1KMBxBZ3kycQHVl66RHH/z3LGhDOqpFmnMzeZpygMb15dQ5 6dx9zY0SXtP3/lEIbOJnB7nIvV0b1nhVxK9xEYbPvrT755013qllyPoo+2tO8C798kzs z1wMoITRDuUCb5DFSGG8D4bWKQJnhUomKyGztfqKbdwiRLaw6wNf4/giX6xK63Nqgc4b DqPXpI6wPvQDplv3s97ZAPEHudqN5JE/4wHgJnTL0RuSQfl8V4VMhEZjoXKUFg5ZocXq fbfg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@lunn.ch header.s=20171124 header.b=qPOnBnuV; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 77si27059882pfz.334.2018.05.09.12.09.29; Wed, 09 May 2018 12:09:44 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@lunn.ch header.s=20171124 header.b=qPOnBnuV; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965148AbeEITI5 (ORCPT + 99 others); Wed, 9 May 2018 15:08:57 -0400 Received: from vps0.lunn.ch ([185.16.172.187]:53870 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S964943AbeEITI4 (ORCPT ); Wed, 9 May 2018 15:08:56 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Type:MIME-Version:References:Message-ID:Subject:Cc:To:From:Date; bh=kJEkLeV2rtmIczx5NM0VqK7NJa/MEB7KYeAEhp09PLE=; b=qPOnBnuVFxIAt6OlLHLeQUHnNNzOJ3fTpQQC0fYV8cDFu9RuGwCbAj7fLWvqPvsp/YcG9qZ5WV28goSYALwYO8ESRt1gFGCdLwhaNoyhXZbis4nTkt2S1QayhoLTddNmSPF5fUz4saUfoXWC+/V0PLpah5VzKXkVZ1Nleb3YoOQ=; Received: from andrew by vps0.lunn.ch with local (Exim 4.84_2) (envelope-from ) id 1fGUSM-0006hJ-1l; Wed, 09 May 2018 21:08:54 +0200 Date: Wed, 9 May 2018 21:08:54 +0200 From: Andrew Lunn To: Vivien Didelot Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, kernel@savoirfairelinux.com, davem@davemloft.net, f.fainelli@gmail.com Subject: Re: [PATCH net-next 3/3] net: dsa: mv88e6xxx: add RMU disable op Message-ID: <20180509190854.GF21718@lunn.ch> References: <20180509153851.10207-1-vivien.didelot@savoirfairelinux.com> <20180509153851.10207-4-vivien.didelot@savoirfairelinux.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20180509153851.10207-4-vivien.didelot@savoirfairelinux.com> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, May 09, 2018 at 11:38:51AM -0400, Vivien Didelot wrote: > The RMU mode bits moved a lot within the Global Control 2 register of > the Marvell switch families. Add an .rmu_disable op to support at least > 3 known alternatives. > > Signed-off-by: Vivien Didelot Reviewed-by: Andrew Lunn Andrew