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[209.132.180.67]) by mx.google.com with ESMTP id k65-v6si330630pga.337.2018.05.10.02.18.19; Thu, 10 May 2018 02:18:34 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757069AbeEJJRw (ORCPT + 99 others); Thu, 10 May 2018 05:17:52 -0400 Received: from regular1.263xmail.com ([211.150.99.141]:49416 "EHLO regular1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757055AbeEJJRt (ORCPT ); Thu, 10 May 2018 05:17:49 -0400 Received: from djw?t-chip.com.cn (unknown [192.168.167.12]) by regular1.263xmail.com (Postfix) with ESMTP id D029BED; Thu, 10 May 2018 17:17:46 +0800 (CST) X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 Received: from localhost.localdomain (localhost [127.0.0.1]) by smtp.263.net (Postfix) with ESMTPA id AC8B73C8; Thu, 10 May 2018 17:17:41 +0800 (CST) X-RL-SENDER: djw@t-chip.com.cn X-FST-TO: linux-rockchip@lists.infradead.org X-SENDER-IP: 59.33.101.82 X-LOGIN-NAME: djw@t-chip.com.cn X-UNIQUE-TAG: <53f0ecd6fc30089b177a4a54f11b0bfa> X-ATTACHMENT-NUM: 0 X-SENDER: djw@t-chip.com.cn X-DNS-TYPE: 7 Received: from unknown (82.101.33.59.broad.zs.gd.dynamic.163data.com.cn [59.33.101.82]) by smtp.263.net (Postfix) whith SMTP id 26450HIUC2J; Thu, 10 May 2018 17:17:44 +0800 (CST) From: djw@t-chip.com.cn To: linux-rockchip@lists.infradead.org Cc: Wayne Chou , Levin Du , Heiko Stuebner , devicetree@vger.kernel.org, David Wu , Arnd Bergmann , Finley Xiao , William Wu , Sugar Zhang , linux-kernel@vger.kernel.org, Robin Murphy , Rob Herring , Rocky Hao , Will Deacon , Mark Rutland , Catalin Marinas , linux-arm-kernel@lists.infradead.org Subject: [PATCH v1 3/5] arm64: dts: rockchip: Add gpio-syscon10 to rk3328 Date: Thu, 10 May 2018 17:16:38 +0800 Message-Id: <1525943800-14095-4-git-send-email-djw@t-chip.com.cn> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1525943800-14095-1-git-send-email-djw@t-chip.com.cn> References: <1525943800-14095-1-git-send-email-djw@t-chip.com.cn> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Levin Du Adding a new gpio controller named "gpio-syscon10" to rk3328, providing access to the pins defined in the syscon GRF_SOC_CON10. Boards using these special pins to control regulators or LEDs, can now utilize existing drivers like gpio-regulator and leds-gpio. Signed-off-by: Levin Du --- Changes in v1: - Split from V0 and add to rk3328.dtsi for general use. arch/arm64/boot/dts/rockchip/rk3328.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi index b8e9da1..73a822d 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi @@ -309,6 +309,12 @@ mode-loader = ; }; + gpio_syscon10: gpio-syscon10 { + compatible = "rockchip,gpio-syscon"; + gpio-controller; + #gpio-cells = <2>; + gpio,syscon-dev = <0 0x0428 0>; + }; }; uart0: serial@ff110000 { -- 2.7.4