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[209.132.180.67]) by mx.google.com with ESMTP id m64-v6si942675pfm.0.2018.05.10.06.50.23; Thu, 10 May 2018 06:50:37 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@infradead.org header.s=bombadil.20170209 header.b=ZsMZb5rz; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757386AbeEJNsr (ORCPT + 99 others); Thu, 10 May 2018 09:48:47 -0400 Received: from bombadil.infradead.org ([198.137.202.133]:39226 "EHLO bombadil.infradead.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757097AbeEJNsq (ORCPT ); Thu, 10 May 2018 09:48:46 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=bombadil.20170209; h=In-Reply-To:Content-Type:MIME-Version :References:Message-ID:Subject:Cc:To:From:Date:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id: List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=KyKy1GyBZg14T3HhGhQRG3muGhtFJ7noZf7eHgcvC3o=; b=ZsMZb5rzILaySTWorpgrb/ziZ buHqtkTgEPHoOqWRIsvZMDPoLSnA/KOWQtljyMDUmyNW6en2ridBuXUyrrXVi/SxfSDw7OWP0yX+X +c6zzOBUKZlbXVKHZi+AzgJPuYr2a5yWqMWzd1R0M0SCazc0ffcrQT/CY9toaaB6vqBR+bANXjMRi cBGi8+UZAh0P9p2WIy9sHalsE1PIzVjzt8CzDfB6zbCvKodxRTKK/QPE5BFzWsmhjn+bO4XB0pTzN nR2ghrq/SzeKjz4ZP6i7puS2jaJki0HStSb/CXLy/f9+GnJgBeY9rEzUwQmNpbSIjMlIo35ZLHpNP NvYXO//pA==; Received: from j217100.upc-j.chello.nl ([24.132.217.100] helo=hirez.programming.kicks-ass.net) by bombadil.infradead.org with esmtpsa (Exim 4.90_1 #2 (Red Hat Linux)) id 1fGlw2-0000mb-TD; Thu, 10 May 2018 13:48:43 +0000 Received: by hirez.programming.kicks-ass.net (Postfix, from userid 1000) id 41AF32029FA13; Thu, 10 May 2018 15:48:41 +0200 (CEST) Date: Thu, 10 May 2018 15:48:41 +0200 From: Peter Zijlstra To: Josh Poimboeuf Cc: Vince Weaver , Ingo Molnar , linux-kernel@vger.kernel.org, Arnaldo Carvalho de Melo , Thomas Gleixner , Andy Lutomirski Subject: Re: perf: fuzzer causes stack going in wrong direction warnings Message-ID: <20180510134841.GE12217@hirez.programming.kicks-ass.net> References: <20180501135850.enx4waqd5d7yowlj@treble> <20180501220458.p3rgwzh3jcqt4jmm@treble> <20180502205009.codkvscnh4j4hm6b@treble> <20180504162557.iodmglq3duomz6c2@treble> <20180505182912.llj7jb3v7yd43t5h@treble> <20180506234935.yq6zxjetlpldpzz7@treble> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20180506234935.yq6zxjetlpldpzz7@treble> User-Agent: Mutt/1.9.5 (2018-04-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sun, May 06, 2018 at 06:49:35PM -0500, Josh Poimboeuf wrote: > Deja vu. Most of these are related to perf PEBS, similar to the > following issue: > > b8000586c90b ("perf/x86/intel: Cure bogus unwind from PEBS entries") > > This is basically the ORC version of that. setup_pebs_sample_data() is > assembling a franken-pt_regs which ORC isn't happy about. RIP is > inconsistent with some of the other registers (like RSP and RBP). > > Peter, any ideas? Urgh.. Something like so perhaps? It's a bit of a hack, but I couldn't quickly think of something nicer. diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c index 707b2a96e516..86f0c15dcc2d 100644 --- a/arch/x86/events/intel/core.c +++ b/arch/x86/events/intel/core.c @@ -2997,6 +2997,9 @@ static int intel_pmu_hw_config(struct perf_event *event) } if (x86_pmu.pebs_aliases) x86_pmu.pebs_aliases(event); + + if (event->attr.sample_type & PERF_SAMPLE_CALLCHAIN) + event->attr.sample_type |= __PERF_SAMPLE_CALLCHAIN_EARLY; } if (needs_branch_stack(event)) { diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c index 8a10a045b57b..2115ac8336b4 100644 --- a/arch/x86/events/intel/ds.c +++ b/arch/x86/events/intel/ds.c @@ -1183,17 +1183,21 @@ static void setup_pebs_sample_data(struct perf_event *event, data->data_src.val = val; } + /* + * We must however always use iregs for the unwinder to stay sane; the + * record BP,SP,IP can point into thin air when the record is from a + * previous PMI context or an (I)RET happend between the record and + * PMI. + */ + if (sample_type & PERF_SAMPLE_CALLCHAIN) + data->callchain = perf_callchain(event, iregs); + /* * We use the interrupt regs as a base because the PEBS record does not * contain a full regs set, specifically it seems to lack segment * descriptors, which get used by things like user_mode(). * * In the simple case fix up only the IP for PERF_SAMPLE_IP. - * - * We must however always use BP,SP from iregs for the unwinder to stay - * sane; the record BP,SP can point into thin air when the record is - * from a previous PMI context or an (I)RET happend between the record - * and PMI. */ *regs = *iregs; @@ -1212,15 +1216,8 @@ static void setup_pebs_sample_data(struct perf_event *event, regs->si = pebs->si; regs->di = pebs->di; - /* - * Per the above; only set BP,SP if we don't need callchains. - * - * XXX: does this make sense? - */ - if (!(sample_type & PERF_SAMPLE_CALLCHAIN)) { - regs->bp = pebs->bp; - regs->sp = pebs->sp; - } + regs->bp = pebs->bp; + regs->sp = pebs->sp; #ifndef CONFIG_X86_32 regs->r8 = pebs->r8; diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/perf_event.h index b8e288a1f740..55b93cd0d48a 100644 --- a/include/uapi/linux/perf_event.h +++ b/include/uapi/linux/perf_event.h @@ -143,6 +143,8 @@ enum perf_event_sample_format { PERF_SAMPLE_PHYS_ADDR = 1U << 19, PERF_SAMPLE_MAX = 1U << 20, /* non-ABI */ + + __PERF_SAMPLE_CALLCHAIN_EARLY = 1UL << 63, }; /* diff --git a/kernel/events/core.c b/kernel/events/core.c index 67612ce359ad..27c9e0f99f30 100644 --- a/kernel/events/core.c +++ b/kernel/events/core.c @@ -6380,7 +6380,9 @@ void perf_prepare_sample(struct perf_event_header *header, if (sample_type & PERF_SAMPLE_CALLCHAIN) { int size = 1; - data->callchain = perf_callchain(event, regs); + if (!(sample_type & __PERF_SAMPLE_CALLCHAIN_EARLY)) + data->callchain = perf_callchain(event, regs); + size += data->callchain->nr; header->size += size * sizeof(u64);