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[209.132.180.67]) by mx.google.com with ESMTP id y185-v6si830863pgd.316.2018.05.10.08.15.33; Thu, 10 May 2018 08:15:48 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=FSUJP1AG; dkim=pass header.i=@codeaurora.org header.s=default header.b=OblPUMxr; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965809AbeEJPPT (ORCPT + 99 others); Thu, 10 May 2018 11:15:19 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:42248 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S964827AbeEJPPR (ORCPT ); Thu, 10 May 2018 11:15:17 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 1CD4660881; Thu, 10 May 2018 15:15:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1525965317; bh=jwPAu+1Vs8BglrMx7h/CWJ2zMqsQ9jk1AwyJkvTDFQs=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=FSUJP1AGZYeEVnynHAWSuwzsW6RxIEvC0vDBP3siXiO1c2OtOZjB64+leieo7UQS2 POUDDgjeaGRTvCL1ot+RhJYWAZOqNNoDBXoQY+v6XbCUxPoo8PieS/FVflreQff0a7 3kBwoCZViHxZqnB8tIeGOg9mcVFvS4954kDvO5y4= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED,T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from localhost (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: ilina@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 04176601EA; Thu, 10 May 2018 15:15:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1525965316; bh=jwPAu+1Vs8BglrMx7h/CWJ2zMqsQ9jk1AwyJkvTDFQs=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=OblPUMxrUBniCLmUTZ7YL8/KDekAUiPli/6WZTS1JsT/n5qSyDnisqxkLfnaRhtbv GbtiXNJ5j9xXquWu/2cvxQmJqGNtjg2OEDCAXsTeX4HPSEfu0fU0qLPYKDFRp1zbtA MnvR+QyiqLUQmfFIcwb7RhiWZF/UD1deaZvjHUrM= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 04176601EA Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=ilina@codeaurora.org Date: Thu, 10 May 2018 09:15:15 -0600 From: Lina Iyer To: Matthias Kaehlcke Cc: andy.gross@linaro.org, david.brown@linaro.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, rnayak@codeaurora.org, bjorn.andersson@linaro.org, linux-kernel@vger.kernel.org, sboyd@kernel.org, evgreen@chromium.org, dianders@chromium.org, rplsssn@codeaurora.org Subject: Re: [PATCH v8 05/10] drivers: qcom: rpmh-rsc: write sleep/wake requests to TCS Message-ID: <20180510151515.GH4698@codeaurora.org> References: <20180509170159.29682-1-ilina@codeaurora.org> <20180509170159.29682-6-ilina@codeaurora.org> <20180509232503.GJ19594@google.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii; format=flowed Content-Disposition: inline In-Reply-To: <20180509232503.GJ19594@google.com> User-Agent: Mutt/1.9.5 (2018-04-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, May 09 2018 at 17:25 -0600, Matthias Kaehlcke wrote: >Hi Lina, > >On Wed, May 09, 2018 at 11:01:54AM -0600, Lina Iyer wrote: >> Sleep and wake requests are sent when the application processor >> subsystem of the SoC is entering deep sleep states like in suspend. >> These requests help lower the system power requirements when the >> resources are not in use. >> >> Sleep and wake requests are written to the TCS slots but are not >> triggered at the time of writing. The TCS are triggered by the firmware >> after the last of the CPUs has executed its WFI. Since these requests >> may come in different batches of requests, it is the job of this >> controller driver to find and arrange the requests into the available >> TCSes. >> >> Signed-off-by: Lina Iyer >> Reviewed-by: Evan Green >> >> --- >> >> diff --git a/drivers/soc/qcom/rpmh-rsc.c b/drivers/soc/qcom/rpmh-rsc.c >> index c0edf3850147..b5894b001ae1 100644 >> --- a/drivers/soc/qcom/rpmh-rsc.c >> +++ b/drivers/soc/qcom/rpmh-rsc.c >> >> >> >> +static int find_match(const struct tcs_group *tcs, const struct tcs_cmd *cmd, >> + int len) >> +{ >> + int i, j; >> + >> + /* Check for already cached commands */ >> + for_each_set_bit(i, tcs->slots, MAX_TCS_SLOTS) { >> + if (tcs->cmd_cache[i] != cmd[0].addr) >> + continue; >> + if (i + len >= MAX_TCS_SLOTS) >> + goto seq_err; > >The command cache can have less than MAX_TCS_SLOTS slot: > That's true. I forgot that I had optimized the cache slots. Thanks for pointing out. >static int rpmh_probe_tcs_config(struct platform_device *pdev, > struct rsc_drv *drv) >{ > ... > tcs->cmd_cache = devm_kcalloc(&pdev->dev, > tcs->num_tcs * ncpt, sizeof(u32), > GFP_KERNEL); > ... >} > >So the condition needs to be: > >if (i + len >= tcs->num_tcs * tcs->ncpt) > >> +static int find_slots(struct tcs_group *tcs, const struct tcs_request *msg, >> + int *tcs_id, int *cmd_id) >> +{ >> + int slot, offset; >> + int i = 0; >> + >> + /* Find if we already have the msg in our TCS */ >> + slot = find_match(tcs, msg->cmds, msg->num_cmds); >> + if (slot >= 0) >> + goto copy_data; >> + >> + /* Do over, until we can fit the full payload in a TCS */ >> + do { >> + slot = bitmap_find_next_zero_area(tcs->slots, MAX_TCS_SLOTS, >> + i, msg->num_cmds, 0); >> + if (slot == MAX_TCS_SLOTS) >> + return -ENOMEM; > >Like above, use 'tcs->num_tcs * tcs->ncpt' as maximum instead of >MAX_TCS_SLOTS. > >> +static int tcs_ctrl_write(struct rsc_drv *drv, const struct tcs_request *msg) >> +{ >> + struct tcs_group *tcs; >> + int tcs_id = 0, cmd_id = 0; >> + unsigned long flags; >> + int ret; >> + >> + tcs = get_tcs_for_msg(drv, msg); >> + if (IS_ERR(tcs)) >> + return PTR_ERR(tcs); >> + >> + spin_lock_irqsave(&tcs->lock, flags); >> + /* find the m-th TCS and the n-th position in the TCS to write to */ > >The comment still refers to the old names 'm' and 'n'. > Really? :) Will fix. Thanks for your review, Lina