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[209.132.180.67]) by mx.google.com with ESMTP id f75-v6si1105419pfh.90.2018.05.10.08.30.54; Thu, 10 May 2018 08:31:09 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=aB5wuLQi; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S966218AbeEJPak (ORCPT + 99 others); Thu, 10 May 2018 11:30:40 -0400 Received: from fllnx209.ext.ti.com ([198.47.19.16]:21486 "EHLO fllnx209.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965410AbeEJPaj (ORCPT ); Thu, 10 May 2018 11:30:39 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by fllnx209.ext.ti.com (8.15.1/8.15.1) with ESMTP id w4AFTbeU004161; Thu, 10 May 2018 10:29:37 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1525966177; bh=Zp24sEGVG2QYLYOEqpMVOGPC3ujXuztOl6b9IG/U63c=; h=Subject:To:CC:References:From:Date:In-Reply-To; b=aB5wuLQiYPywS3tKZsqJRl6aWcHb8vp3UmQ32wt/yhubt73ij08nwhpVddWBxSvhv tfvClg/7fJ88y0kD2CG57eeI93wtkz5XnRd/9TBK6MgLaLLC4WDDUYSXIf1smDkMCs BzkPVl7ZYhCY9FUMGJyoLx5997HcFlu8Iws61CTQ= Received: from DLEE103.ent.ti.com (dlee103.ent.ti.com [157.170.170.33]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id w4AFTbmC008852; Thu, 10 May 2018 10:29:37 -0500 Received: from DLEE104.ent.ti.com (157.170.170.34) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Thu, 10 May 2018 10:29:36 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Thu, 10 May 2018 10:29:36 -0500 Received: from [172.24.190.172] (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w4AFTYjR002255; Thu, 10 May 2018 10:29:35 -0500 Subject: Re: [PATCH v3 1/2] clk: davinci: pll-dm355: drop pll2_sysclk2 To: David Lechner , , CC: Michael Turquette , Stephen Boyd , References: <20180509153642.22399-1-david@lechnology.com> <20180509153642.22399-2-david@lechnology.com> From: Sekhar Nori Message-ID: Date: Thu, 10 May 2018 20:59:33 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.7.0 MIME-Version: 1.0 In-Reply-To: <20180509153642.22399-2-david@lechnology.com> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wednesday 09 May 2018 09:06 PM, David Lechner wrote: > This removes pll2_sysclk2 from the TI DM355 clock driver. This SoC > doesn't have such a clock. Also, SYSCLK_ALWAYS_ENABLED is transferred > to pll2_sysclk1 since it drives the DDR and doesn't have another > mechanism to keep it on. > > Reported-by: Sekhar Nori > Signed-off-by: David Lechner I would not have minded the SYSCLK_ALWAYS_ENABLED change to be a separate patch too, but: Acked-by: Sekhar Nori Thanks, Sekhar