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[209.132.180.67]) by mx.google.com with ESMTP id m63-v6si2009800pld.429.2018.05.10.19.37.20; Thu, 10 May 2018 19:37:40 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=NujQeCxX; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752045AbeEKChJ (ORCPT + 99 others); Thu, 10 May 2018 22:37:09 -0400 Received: from mail.kernel.org ([198.145.29.99]:33496 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751209AbeEKChI (ORCPT ); Thu, 10 May 2018 22:37:08 -0400 Received: from localhost (LFbn-NCY-1-193-82.w83-194.abo.wanadoo.fr [83.194.41.82]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id AD5B020779; Fri, 11 May 2018 02:37:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1526006228; bh=5hnuYfcdv5obRYPzSZJgTZrAHj8A4E5PwH55BwxrzXU=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=NujQeCxXN6XCnkkayKtWHv7wD99ABl+YnCVrysb9e2Wp5i7g2IPdAHHQJBvfT/MaQ 7X0Rv7OEBGeVu1Qxqd8slpPmGbukxgFEDLaBd+ZtsJfXE7zaTIOKY6giPYaN8nfbVK TXKYB0jVJs1Oou6R9HYvnO0aswsMT7M72d4c/+7Q= Date: Fri, 11 May 2018 04:37:05 +0200 From: Frederic Weisbecker To: Andy Lutomirski Cc: Mark Rutland , LKML , Jiri Olsa , Namhyung Kim , Peter Zijlstra , Linus Torvalds , Yoshinori Sato , Benjamin Herrenschmidt , Catalin Marinas , Chris Zankel , Paul Mackerras , Thomas Gleixner , Will Deacon , Michael Ellerman , Rich Felker , Ingo Molnar , Alexander Shishkin , Arnaldo Carvalho de Melo , Max Filippov Subject: Re: [PATCH 4/9] arm: Split breakpoint validation into "check" and "commit" Message-ID: <20180511023703.GA18521@lerouge> References: <1525634395-23380-1-git-send-email-frederic@kernel.org> <1525634395-23380-5-git-send-email-frederic@kernel.org> <20180508111323.mmjo4ky4txzi4gx4@lakrids.cambridge.arm.com> <20180509113257.hl6frl424trdt2em@lakrids.cambridge.arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, May 09, 2018 at 07:51:28PM +0000, Andy Lutomirski wrote: > On Wed, May 9, 2018 at 4:33 AM Mark Rutland wrote: > > > On Tue, May 08, 2018 at 12:13:23PM +0100, Mark Rutland wrote: > > > Hi Frederick, > > > > > > On Sun, May 06, 2018 at 09:19:50PM +0200, Frederic Weisbecker wrote: > > > > The breakpoint code mixes up attribute check and commit into a single > > > > code entity. Therefore the validation may return an error due to > > > > incorrect atributes while still leaving halfway modified architecture > > > > breakpoint struct. > > > > > > > > Prepare fox fixing this misdesign and separate both logics. > > > > > > Could you elaborate on what the problem is? I would have expected that > > > when arch_build_bp_info() returns an error code, we wouldn't > > > subsequently use the arch_hw_breakpoint information. Where does that > > > happen? > > > From digging, I now see that this is a problem when > > modify_user_hw_breakpoint() is called on an existing breakpoint. It > > would be nice to mention that in the commit message. > > > > I also see that the check and commit hooks have to duplicate a > > > reasonable amount of logic, e.g. the switch on bp->attr.type. Can we > > > instead refactor the existing arch_build_bp_info() hooks to use a > > > temporary arch_hw_breakpoint, and then struct assign it after all the > > > error cases, > e.g. > > > > > > static int arch_build_bp_info(struct perf_event *bp) > > > { > > > struct arch_hw_breakpoint hbp; > > > > > > if (some_condition(bp)) > > > hbp->field = 0xf00; > > > > > > switch (bp->attr.type) { > > > case FOO: > > > return -EINVAL; > > > case BAR: > > > hbp->other_field = 7; > > > break; > > > }; > > > > > > if (failure_case(foo)) > > > return err; > > > > > > *counter_arch_bp(bp) = hbp; > > > } > > > > > > ... or is that also problematic? > > > IIUC, this *would* work, but it is a little opaque. > > > Perhaps we could explicitly pass the temporary arch_hw_breakpoint in, > > and have the core code struct-assign it after checking for errors? > > Hmm, maybe. OTOH, I'm not really convinced that arch_hw_breakpoint is even > needed. x86 at least could probably just regenerate the DRn and DR7 bits > on the fly as needed rather than caching them with basically no loss in > performance. I'm not sure, we would need to translate the length and types everytime we schedule in/out a perf breakpoint event. Maybe it's not too much a big deal but perf event sched in/out is something I would consider a fast path and there is quite a few switch/case involved there.