Received: by 2002:ac0:a594:0:0:0:0:0 with SMTP id m20-v6csp725319imm; Fri, 11 May 2018 05:32:32 -0700 (PDT) X-Google-Smtp-Source: AB8JxZreDysqv1DtHwpOFsOsqP1YEzbAJoWcBcj2Y9CxFcFVRLcgXLWPcIq97nnkwNBqFhKWCwlQ X-Received: by 2002:a63:741b:: with SMTP id p27-v6mr3030022pgc.97.1526041952443; Fri, 11 May 2018 05:32:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1526041952; cv=none; d=google.com; s=arc-20160816; b=jpgnjH7Wn5tWC+P4x9vmtB+BR9JDva9Ifp9VboNQGH1SUwExV1SwYdGEYRUodPMgjl 8zmZKw0aG+5w9G7rMna3kPhxtWcXiIzP2+BzY0vhymjim+UHW9XiuvT+LeBGdJ4vgHre hzCmmDOuZz0VxVmZD3FXixtl0pgRyXFk4taA5W/jO5tgdy/fyayl1edRtBegszi3n83z fkW/TJccPPgzr0xcB0ddX92DJZ8K6tp5q8zA+QSNFvwKSmrEcYKC+YjJDS2GvhsGlb/S JY8cJ0Z/g3LEzNwHJVw4HusNXggaF4/baaBQzOqAe+x5cyth8K6X803TeeYpSFERfhPE gOuw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:cc:to:subject:message-id:date:from :references:in-reply-to:mime-version:dkim-signature :arc-authentication-results; bh=hntXyES1ykgxSWdk54uNFLAEh+iHjX/m9Oqywi0IDI8=; b=S9we36DvI20XnYPpYmxgIQru2RvtyNK9pZ6+HdbxULapLByWiqrw3UpPF3EW+zcN/4 Io9+cpor4Hrax/f66mRVzhX6Ak5pbWKQLaMGRYTxM84h+GzwVLE4ajj7Pcn3DQa67ZX9 RlKU4Pc2m94rpcskOYievauZWOekkGO/rJ30kbjIew8aJwdZ0pFl0nrOTPJVFUBucJTv BDCut9WGWFmQVsGdyyLJwKvhV1YeKx/XPMiG3i+2FRRpNARRhlLRF361cmDqM4hxROOD Sk7NSETZGDIhzpJhqdDsRl5S9TiyHiZRigV1tp+t+hcWJ+F1KWy4yU9t/dUDME9MqU1c DgrQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=2va3gbQn; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d12-v6si3112325plo.551.2018.05.11.05.32.17; Fri, 11 May 2018 05:32:32 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=2va3gbQn; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752677AbeEKMcI (ORCPT + 99 others); Fri, 11 May 2018 08:32:08 -0400 Received: from mail.kernel.org ([198.145.29.99]:56228 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750777AbeEKMcH (ORCPT ); Fri, 11 May 2018 08:32:07 -0400 Received: from mail-qt0-f177.google.com (mail-qt0-f177.google.com [209.85.216.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 6C9C12075C; Fri, 11 May 2018 12:32:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1526041926; bh=sE9TdYGrKK6eHu8LV1Hs4aeF/yYIuusQxs9yXY+BZ8k=; h=In-Reply-To:References:From:Date:Subject:To:Cc:From; b=2va3gbQnsVFf2IBkpAWpCGk5u20+PgWur+W5KHF4XXHRVl3Py0mn7OTWyjlm609jj DvmX34Gq5MCAKIXHHyL+wJmSN2MbXmPnN9d9W5UiU4tCTwrpvMDaJ/LKorn/xc0rVM 4geZe9i50jlfNX8NoqZ18bG1YBu1QonJJmq7fTqk= Received: by mail-qt0-f177.google.com with SMTP id e8-v6so6792080qth.0; Fri, 11 May 2018 05:32:06 -0700 (PDT) X-Gm-Message-State: ALKqPwd1jDFOByp4+YsdxM9SvmUJxDCtLAMgNDckBfh4bnF+5jy/J9Y3 bWgeocVFE5O3ApxrSAOdOD5gOJzZQ8KjszNavA== X-Received: by 2002:a0c:85e6:: with SMTP id o93-v6mr4909556qva.27.1526041925620; Fri, 11 May 2018 05:32:05 -0700 (PDT) MIME-Version: 1.0 Received: by 10.12.155.2 with HTTP; Fri, 11 May 2018 05:31:45 -0700 (PDT) In-Reply-To: <1525985204-11525-1-git-send-email-thor.thayer@linux.intel.com> References: <1525985204-11525-1-git-send-email-thor.thayer@linux.intel.com> From: Rob Herring Date: Fri, 11 May 2018 07:31:45 -0500 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH] arm64: dts: stratix10: Add QSPI support for Stratix10 To: thor.thayer@linux.intel.com Cc: Dinh Nguyen , Mark Rutland , Catalin Marinas , Will Deacon , devicetree@vger.kernel.org, "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" , "linux-kernel@vger.kernel.org" Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, May 10, 2018 at 3:46 PM, wrote: > From: Thor Thayer > > Add qspi_clock > The qspi_clk frequency is updated by U-Boot before starting Linux. > Add QSPI interface node. > Add QSPI flash memory child node. > Setup the QSPI memory in 2 partitions. > > Signed-off-by: Thor Thayer > --- > arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 22 +++++++++++++++ > .../boot/dts/altera/socfpga_stratix10_socdk.dts | 31 ++++++++++++++++++++++ > 2 files changed, 53 insertions(+) > > diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi > index e6b059378dc0..ed47dfce3ba6 100644 > --- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi > +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi > @@ -119,6 +119,12 @@ > #clock-cells = <0>; > compatible = "fixed-clock"; > }; > + > + qspi_clk: qspi_clk { s/_/-/ > + #clock-cells = <0>; > + compatible = "fixed-clock"; > + clock-frequency = <200000000>; > + }; > }; > > gmac0: ethernet@ff800000 { > @@ -466,5 +472,21 @@ > interrupts = <16 4>, <48 4>; > }; > }; > + > + qspi: spi@ff8d2000 { > + compatible = "cdns,qspi-nor"; > + #address-cells = <1>; > + #size-cells = <0>; > + reg = <0xff8d2000 0x100>, > + <0xff900000 0x100000>; > + interrupts = <0 3 4>; > + cdns,fifo-depth = <128>; > + cdns,fifo-width = <4>; > + cdns,trigger-address = <0x00000000>; > + clocks = <&qspi_clk>; > + bus-num = <1>; > + > + status = "disabled"; > + }; > }; > }; > diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts > index f9b1ef12db48..60251462067a 100644 > --- a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts > +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts > @@ -147,3 +147,34 @@ > reg = <0x68>; > }; > }; > + > +&qspi { > + flash0: n25q00@0 { flash@0 > + #address-cells = <1>; > + #size-cells = <1>; > + compatible = "n25q00aa"; > + reg = <0>; > + spi-max-frequency = <50000000>; > + > + m25p,fast-read; > + cdns,page-size = <256>; > + cdns,block-size = <16>; > + cdns,read-delay = <1>; > + cdns,tshsl-ns = <50>; > + cdns,tsd2d-ns = <50>; > + cdns,tchsh-ns = <4>; > + cdns,tslch-ns = <4>; > + > + partition@qspi-boot { use a 'partitions' node to contain all the partitions. > + label = "Boot and fpga data"; > + /* 64MB for boot and FPGA data */ > + reg = <0x0 0x4000000>; > + }; > + > + partition@qspi-rootfs { > + label = "Root Filesystem - JFFS2"; > + /* 64MB for Linux jffs2 */ > + reg = <0x4000000 0x4000000>; > + }; > + }; > +}; > -- > 2.7.4 >