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[209.132.180.67]) by mx.google.com with ESMTP id x25-v6si7229394pfj.347.2018.05.12.20.24.55; Sat, 12 May 2018 20:25:10 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=QdowkRKk; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751263AbeEMDYo (ORCPT + 99 others); Sat, 12 May 2018 23:24:44 -0400 Received: from mail-pg0-f67.google.com ([74.125.83.67]:36631 "EHLO mail-pg0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750985AbeEMDYm (ORCPT ); Sat, 12 May 2018 23:24:42 -0400 Received: by mail-pg0-f67.google.com with SMTP id z70-v6so4030053pgz.3; Sat, 12 May 2018 20:24:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=OTtvy5CfcaT0VgFGf3k+UVTNQEdkWFNiy38kj39y5x4=; b=QdowkRKk0jjKDuCup65/a7iWpUD4nempkao6F4QvbkAy0WkUGi39uoeDoPL79wBx5U bc14Pm1z1qJyFxLi3F5ikf8KYElcyZcuHWr1bUVhh63uOI0iwEnWiiraZRMz8KtRY/FA BqDsxBBAHtSu7/Lp+I1RKdCgw+0rvUsUFCxtM2JLqzP++M2m00sELRG/neiZczUjAmD3 lEQSEoVaHngEUXDvPYXM3nxAKZ3TSMYwVc5DAp0INFeU7Raizqr6uv4I29o8jkGJHIXH lc1BH2dB5khNR6AfayU6qPaTFmmCj/vj+DtsX4q8VI/c0+0hRhdsQI2IFV2aOUlOR7DG 1ljw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=OTtvy5CfcaT0VgFGf3k+UVTNQEdkWFNiy38kj39y5x4=; b=CBXoMAJ4qzjeh+pbJsHCh2lEbQX66Ibg9JLyUP7aqMtQCAoqzkGMFCUg7JXSjy6gKU zsh2jlV1jnXEjKdQ7QIbe/pcbyRrXsWeU5yxyArJeKhBBxdqc6NaQAR2bSsuvIRJ4/W1 hnD9lkpNm9UHjPHXXecs3Zo/tZKxFBi80UIP+SF3xnbqWcG9Ap6ADodQzLqdhTc2UHMz QT2TG6ujTbhaMRwBpbL82MsJBENbnWeIlz20/o/08gBInLHnMQmS/8ba9lCtFd7KGqlx BcyvLxlF5sgc0QHwia0T0L8BjAJ4LNioO69prGJ40cfLFhmTBqLMzk++bhvFojC4FuEd HA0w== X-Gm-Message-State: ALKqPwfijy/7Ti3wiOJw3iSH4sd0NFEsmuSaxjFNAQ2CIwZnrkBSdMZR 7lQDgB5Z/hZ0OFgms1XDC5wPzaqUWXM= X-Received: by 2002:a62:4fd8:: with SMTP id f85-v6mr5157799pfj.77.1526181882268; Sat, 12 May 2018 20:24:42 -0700 (PDT) Received: from localhost.localdomain ([223.72.71.79]) by smtp.googlemail.com with ESMTPSA id n10-v6sm15810096pfk.145.2018.05.12.20.24.38 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 12 May 2018 20:24:41 -0700 (PDT) From: Wanpeng Li X-Google-Original-From: Wanpeng Li To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org Cc: Paolo Bonzini , =?UTF-8?q?Radim=20Kr=C4=8Dm=C3=A1=C5=99?= , Junaid Shahid Subject: [PATCH 2/2] KVM: X86: Fix loss of CR3_PCID_INVD bit when guest writes CR3 Date: Sat, 12 May 2018 20:24:14 -0700 Message-Id: <1526181854-3631-1-git-send-email-wanpengli@tencent.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Wanpeng Li SDM volume 3, section 4.10.4: * MOV to CR3. The behavior of the instruction depends on the value of CR4.PCIDE: — If CR4.PCIDE = 1 and bit 63 of the instruction’s source operand is 1, the instruction is not required to invalidate any TLB entries or entries in paging-structure caches. The CR3_PCID_INVD bit should not be removed if CR4.PCIDE = 1 when guest writes CR3, this patch fixes it. Cc: Paolo Bonzini Cc: Radim Krčmář Cc: Junaid Shahid Signed-off-by: Wanpeng Li --- arch/x86/kvm/x86.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 9a90668..438f140 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -849,11 +849,13 @@ EXPORT_SYMBOL_GPL(kvm_set_cr4); int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3) { + unsigned long cr3_check = cr3; + #ifdef CONFIG_X86_64 bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE); if (pcid_enabled) - cr3 &= ~CR3_PCID_INVD; + cr3_check &= ~CR3_PCID_INVD; #endif if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) { @@ -863,7 +865,7 @@ int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3) } if (is_long_mode(vcpu) && - (cr3 & rsvd_bits(cpuid_maxphyaddr(vcpu), 63))) + (cr3_check & rsvd_bits(cpuid_maxphyaddr(vcpu), 63))) return 1; else if (is_pae(vcpu) && is_paging(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3)) -- 2.7.4